Haimoto; Takashi
Patent Applications and Registrations
Patent applications and USPTO patent grants for Haimoto; Takashi.The latest application filed is for "wafer processing method".
- Haimoto; Takashi - Tokyo JP
- Haimoto; Takashi - Kanagawa N/A JP
- Haimoto; Takashi - Mie-ken JP
| Patent | Date |
|---|---|
| Method of dividing a wafer by back grinding Grant 10,312,144 - Koshimizu , et al. | 2019-06-04 |
| Wafer Processing Method App 20170271208 - Koshimizu; Hideki ; et al. | 2017-09-21 |
| Wafer processing method using adhesive tape to pick up device chips Grant 9,716,040 - Haimoto , et al. July 25, 2 | 2017-07-25 |
| Memory device and method for manufacturing the same Grant 9,680,094 - Fujii , et al. June 13, 2 | 2017-06-13 |
| Wafer Processing Method App 20170053830 - Haimoto; Takashi ; et al. | 2017-02-23 |
| Nonvolatile variable resistive device Grant 9,105,838 - Haimoto , et al. August 11, 2 | 2015-08-11 |
| Nonvolatile Memory Device App 20140138598 - Haimoto; Takashi ; et al. | 2014-05-22 |
| Memory Device And Method For Manufacturing The Same App 20140061570 - FUJII; Shosuke ; et al. | 2014-03-06 |
| Memory device Grant 8,664,632 - Matsushita , et al. March 4, 2 | 2014-03-04 |
| Memory Device App 20130228736 - MATSUSHITA; Daisuke ; et al. | 2013-09-05 |
| Nonvolatile Variable Resistive Device App 20120211719 - HAIMOTO; Takashi ; et al. | 2012-08-23 |
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