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name:-0.12888193130493
name:-0.00062704086303711
Guttag; Karl M. Patent Filings

Guttag; Karl M.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Guttag; Karl M..The latest application filed is for "compact heads-up display system".

Company Profile
0.116.16
  • Guttag; Karl M. - Round Rock TX
  • Guttag; Karl M. - Plano TX US
  • Guttag; Karl M. - Missouri City TX
  • Guttag; Karl M. - Dallas TX
  • Guttag; Karl M. - Sugar Land TX
  • Guttag; Karl M. - Houston TX
  • Guttag; Karl M. - Sugarland TX
  • Guttag; Karl M. - Missouri City Harris County
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Compact Heads-Up Display System
App 20160025973 - Guttag; Karl M. ;   et al.
2016-01-28
Allocating registers on a spatial light modulator
Grant 8,766,887 - Guttag July 1, 2
2014-07-01
Allocating Registers On A Spatial Light Modulator
App 20140009371 - Guttag; Karl M.
2014-01-09
Allocation registers on a spatial light modulator
Grant 8,558,856 - Guttag October 15, 2
2013-10-15
Long instruction word controlling plural independent processor operations
Grant RE44,190 - Guttag , et al. April 30, 2
2013-04-30
Allocation Registers On A Spatial Light Modulator
App 20120287173 - GUTTAG; Karl M. ;   et al.
2012-11-15
Allocating memory on a spatial light modulator
Grant 8,189,015 - Guttag May 29, 2
2012-05-29
Mapping pixel values
Grant 8,120,597 - Guttag February 21, 2
2012-02-21
Instructions controlling light modulating elements
Grant 8,089,431 - Guttag , et al. January 3, 2
2012-01-03
Bit serial control of light modulating elements
Grant 8,035,627 - Guttag , et al. October 11, 2
2011-10-11
Variable storage of bits on a backplane
Grant 8,004,505 - Guttag August 23, 2
2011-08-23
Masked write on an array of drive bits
Grant 7,924,274 - Guttag April 12, 2
2011-04-12
Recursive feedback control of light modulating elements
Grant 7,667,678 - Guttag February 23, 2
2010-02-23
Long instruction word controlling plural independent processor operations
Grant 7,389,317 - Guttag , et al. June 17, 2
2008-06-17
Recursive Feedback Control Of Light Modulating Elements
App 20070132679 - Guttag; Karl M.
2007-06-14
Mapping Pixel Values
App 20070120787 - Guttag; Karl M.
2007-05-31
Variable Storage of Bits on a Backplane
App 20070097047 - Guttag; Karl M.
2007-05-03
Bit Serial Control of Light Modulating Elements
App 20060274001 - Guttag; Karl M. ;   et al.
2006-12-07
Conditional Control of an Array of Outputs
App 20060274000 - Guttag; Karl M. ;   et al.
2006-12-07
Masked Write On An Array of Drive Bits
App 20060274002 - Guttag; Karl M.
2006-12-07
Allocating Memory on a Spatial Light Modulator
App 20060268022 - Guttag; Karl M.
2006-11-30
Level Shifting and Logic Circuit
App 20060232526 - Guttag; Karl M. ;   et al.
2006-10-19
Instructions Controlling Light Modulating Elements
App 20060208963 - Guttag; Karl M. ;   et al.
2006-09-21
Digital backplane
Grant 7,071,908 - Guttag , et al. July 4, 2
2006-07-04
System and method for using a two-stage multiplexing architecture for performing combinations of passing, rearranging, and duplicating operations on data
Grant 7,039,795 - Balmer , et al. May 2, 2
2006-05-02
Data processing system with register store/load utilizing data packing/unpacking
Grant 6,829,696 - Balmer , et al. December 7, 2
2004-12-07
Digital backplane
App 20040233150 - Guttag, Karl M. ;   et al.
2004-11-25
Method and system for displaying information using a transportable display chip
Grant 6,803,885 - Guttag , et al. October 12, 2
2004-10-12
Data processing apparatus with indirect register file access
Grant 6,754,809 - Guttag , et al. June 22, 2
2004-06-22
Data processor with flexible multiply unit
Grant 6,711,602 - Bhandal , et al. March 23, 2
2004-03-23
System and method for processing data using a multiplexing architecture
App 20030233529 - Balmer, Keith ;   et al.
2003-12-18
Long instruction word controlling plural independent processor operations
App 20030105793 - Guttag, Karl M. ;   et al.
2003-06-05
Long instruction word controlling plural independent processor operations
Grant 6,370,558 - Guttag , et al. April 9, 2
2002-04-09
Long instruction word controlling plural independent processor operations
Grant 6,240,437 - Guttag , et al. May 29, 2
2001-05-29
Circuits, systems, and methods for communicating computer video output to a remote location
Grant 6,219,695 - Guttag , et al. April 17, 2
2001-04-17
Instruction having bit field designating status bits protected from modification corresponding to arithmetic logic unit result
Grant 6,173,394 - Guttag , et al. January 9, 2
2001-01-09
Three input arithmetic logic unit with barrel rotator
Grant 6,116,768 - Guttag , et al. September 12, 2
2000-09-12
Three input arithmetic logic unit with shifter
Grant 6,098,163 - Guttag , et al. August 1, 2
2000-08-01
High-speed memory arranged for operating synchronously with a microprocessor
Grant 6,088,280 - Vogley , et al. July 11, 2
2000-07-11
Long instruction word controlling plural independent processor operations
Grant 6,032,170 - Guttag , et al. February 29, 2
2000-02-29
Method, apparatus and system forming the sum of data in plural equal sections of a single data word
Grant 6,016,538 - Guttag , et al. January 18, 2
2000-01-18
Three input arithmetic logic unit with shifter and/or mask generator
Grant 5,995,748 - Guttag , et al. November 30, 1
1999-11-30
Three input arithmetic logic unit with shifter and mask generator
Grant 5,974,539 - Guttag , et al. October 26, 1
1999-10-26
Apparatus and system for sum of plural absolute differences
Grant 5,960,193 - Guttag , et al. September 28, 1
1999-09-28
Memory configuration cache with multilevel hierarchy least recently used cache entry replacement
Grant 5,956,744 - Robertson , et al. September 21, 1
1999-09-21
Process of processing graphics data
Grant 5,923,340 - Guttag , et al. July 13, 1
1999-07-13
Random access memory with latency arranged for operating synchronously with a micro processor and a system including a data processor, a synchronous DRAM, a peripheral device, and a system clock
Grant 5,808,958 - Vogley , et al. September 15, 1
1998-09-15
Arithmetic logic unit with conditional register source selection
Grant 5,805,913 - Guttag , et al. September 8, 1
1998-09-08
Base address generation in a multi-processing system having plural memories with a unified address space corresponding to each processor
Grant 5,761,726 - Guttag , et al. June 2, 1
1998-06-02
Long instruction word controlling plural independent processor operations
Grant 5,742,538 - Guttag , et al. April 21, 1
1998-04-21
Hardware branching employing loop control registers loaded according to status of sections of an arithmetic logic unit divided into a plurality of sections
Grant 5,734,880 - Guttag , et al. March 31, 1
1998-03-31
Method, apparatus and system forming the sum of data in plural equal sections of a single data word
Grant 5,727,225 - Guttag , et al. March 10, 1
1998-03-10
Message passing and blast interrupt from processor
Grant 5,724,599 - Balmer , et al. March 3, 1
1998-03-03
Three input arithmetic logic unit with shifting means at one input forming a sum/difference of two inputs logically anded with a third input logically ored with the sum/difference logically anded with an inverse of the third input
Grant 5,696,954 - Guttag , et al. December 9, 1
1997-12-09
Memory store from a selected one of a register pair conditional upon the state of a selected status bit
Grant 5,696,959 - Guttag , et al. December 9, 1
1997-12-09
Data processor having capability to perform both floating point operations and memory access in response to a single instruction
Grant 5,673,407 - Poland , et al. September 30, 1
1997-09-30
Guided transfers with variable stepping
Grant 5,651,127 - Gove , et al. July 22, 1
1997-07-22
Iterative division apparatus, system and method employing left most one's detection and left most one's detection with exclusive or
Grant 5,644,524 - Van Aken , et al. July 1, 1
1997-07-01
Arithmetic logic unit having plural independent sections and register storing resultant indicator bit from every section
Grant 5,640,578 - Balmer , et al. June 17, 1
1997-06-17
Three input arithmetic logic unit with controllable shifter and mask generator
Grant 5,634,065 - Guttag , et al. May 27, 1
1997-05-27
Reconfigurable SIMD/MIMD processor using switch matrix to allow access to a parameter memory by any of the plurality of processors
Grant 5,613,146 - Gove , et al. March 18, 1
1997-03-18
Address generator with controllable modulo power of two addressing capability
Grant 5,606,520 - Gove , et al. February 25, 1
1997-02-25
Three input arithmetic logic unit with mask generator
Grant 5,600,847 - Guttag , et al. February 4, 1
1997-02-04
Programmable data processing system and apparatus for executing both general purpose instructions and special purpose graphic instructions
Grant 5,596,767 - Guttag , et al. January 21, 1
1997-01-21
Multiple operations employing divided arithmetic logic unit and multiple flags register
Grant 5,592,405 - Gove , et al. January 7, 1
1997-01-07
Three input arithmetic logic unit with mask generator
Grant 5,590,350 - Guttag , et al. December 31, 1
1996-12-31
Random access memory arranged for operating synchronously with a microprocessor and a system including a data processor, a synchronous DRAM, a peripheral device, and a system clock
Grant 5,587,954 - Vogley , et al. December 24, 1
1996-12-24
Architecture of transfer processor
Grant 5,524,265 - Balmer , et al. June 4, 1
1996-06-04
Graphics display processor, a graphics display system and a method of processing graphics data with control signals connected to a central processing unit and graphics circuits
Grant 5,522,082 - Guttag , et al. May 28, 1
1996-05-28
Reconfigurable multi-processor operating in SIMD mode with one processor fetching instructions for use by remaining processors
Grant 5,522,083 - Gove , et al. May 28, 1
1996-05-28
Graphics display system using tiles of data
Grant 5,517,609 - Guillemaud , et al. May 14, 1
1996-05-14
Long instruction word controlling plural independent processor operations
Grant 5,509,129 - Guttag , et al. April 16, 1
1996-04-16
Three input arithmetic logic unit employing carry propagate logic
Grant 5,493,524 - Guttag , et al. February 20, 1
1996-02-20
Pixel block transfer with transparency
Grant 5,493,646 - Guttag , et al. February 20, 1
1996-02-20
Plural memory access address generation employing guide table entries forming linked list
Grant 5,487,146 - Guttag , et al. January 23, 1
1996-01-23
Three input arithmetic logic unit forming the sum of a first input anded with a first boolean combination of a second input and a third input plus a second boolean combination of the second and third inputs
Grant 5,485,411 - Guttag , et al. January 16, 1
1996-01-16
Huffman decoding method, circuit and system employing conditional subtraction for conversion of negative numbers
Grant 5,479,166 - Read , et al. December 26, 1
1995-12-26
Multi-processor with crossbar link of processors and memories and method of operation
Grant 5,471,592 - Gove , et al. November 28, 1
1995-11-28
Three input arithmetic logic unit forming the sum of a first Boolean combination of first, second and third inputs plus a second Boolean combination of first, second and third inputs
Grant 5,465,224 - Guttag , et al. November 7, 1
1995-11-07
Graphics computer system, a graphics system arrangement, a display system, a graphics processor and a method of processing graphic data
Grant 5,437,011 - Guttag , et al. July 25, 1
1995-07-25
Video display system using memory with a register arranged to present an entire pixel at once to the display
Grant 5,434,969 - Heilveil , et al. July 18, 1
1995-07-18
Method of operating a data processing apparatus to compute correlation
Grant 5,420,809 - Read , et al. May 30, 1
1995-05-30
Devices, systems and methods for accessing data using a pixel preferred data organization
Grant 5,398,316 - Guttag , et al. March 14, 1
1995-03-14
System including a data processor, a synchronous dram, a peripheral device, and a system clock
Grant 5,390,149 - Vogley , et al. February 14, 1
1995-02-14
Process for performing a windowing operation in an array move, a graphics computer system, a display system, a graphic processor and a graphics display system
Grant 5,375,198 - Guttag , et al. December 20, 1
1994-12-20
Multi-processor having control over synchronization of processors in mind mode and method of operation
Grant 5,371,896 - Gove , et al. December 6, 1
1994-12-06
Graphics processing apparatus having instruction which operates separately on X and Y coordinates of pixel location registers
Grant 5,333,261 - Guttag , et al. July 26, 1
1994-07-26
Graphics processing apparatus having color expand operation for drawing color graphics from monochrome data
Grant 5,294,918 - Preston , et al. * March 15, 1
1994-03-15
Controlled delay devices, systems and methods
Grant 5,293,468 - Nye , et al. March 8, 1
1994-03-08
Graphics systems, palettes and methods with combined video and shift clock control
Grant 5,287,100 - Guttag , et al. February 15, 1
1994-02-15
Process for effecting an array move instruction, a graphics computer system, a display system, a graphics processor and graphics display system
Grant 5,283,863 - Guttag , et al. February 1, 1
1994-02-01
Video random access memory having a split register and a multiplexer
Grant 5,270,973 - Guillemaud , et al. December 14, 1
1993-12-14
Video graphics display memory swizzle logic circuit and method
Grant 5,269,001 - Guttag December 7, 1
1993-12-07
Data processing apparatus with self-emulation capability
Grant 5,249,266 - Dye , et al. * September 28, 1
1993-09-28
Dual mode SIMD/MIMD processor providing reuse of MIMD instruction memories as data memories when operating in SIMD mode
Grant 5,239,654 - Ing-Simmons , et al. August 24, 1
1993-08-24
Switch matrix having integrated crosspoint logic and method of operation
Grant 5,226,125 - Balmer , et al. July 6, 1
1993-07-06
Multi-processor reconfigurable in single instruction multiple data (SIMD) and multiple instruction multiple data (MIMD) modes and method of operation
Grant 5,212,777 - Gove , et al. May 18, 1
1993-05-18
Video display system using memory with parallel and serial access employing serial shift registers selected by column address
Grant 5,163,024 - Heilveil , et al. November 10, 1
1992-11-10
Graphics data processing apparatus with draw and advance operation
Grant 5,162,784 - Guttag , et al. November 10, 1
1992-11-10
Graphics processing apparatus having instruction which operates separately on X and Y coordinates of pixel location registers
Grant 5,142,621 - Guttag , et al. August 25, 1
1992-08-25
Data processing apparatus with self-emulation capability
Grant 5,140,687 - Dye , et al. August 18, 1
1992-08-18
Graphics processing apparatus having color expand operation for drawing color graphics from monochrome data
Grant 5,095,301 - Guttag , et al. March 10, 1
1992-03-10
Graphics data processing apparatus having non-linear saturating operations on multibit color data
Grant 4,933,878 - Guttag , et al. June 12, 1
1990-06-12
Graphics data processing apparatus having image operations with transparent color having a selectable number of bits
Grant 4,752,893 - Guttag , et al. June 21, 1
1988-06-21
Video display system using memory with parallel and serial access employing serial shift registers selected by column address
Grant 4,747,081 - Heilveil , et al. May 24, 1
1988-05-24
Method and apparatus for clearing the memory of a video computer
Grant 4,720,819 - Pinkham , et al. January 19, 1
1988-01-19
Compressed control decoder for microprocessor system
Grant 4,694,391 - Guttag , et al. September 15, 1
1987-09-15
Control of data access to memory for improved video system
Grant 4,688,197 - Novak , et al. August 18, 1
1987-08-18
Random/serial access mode selection circuit for a video memory system
Grant 4,663,735 - Novak , et al. May 5, 1
1987-05-05
Video system with single memory space for instruction, program data and display data
Grant 4,660,156 - Guttag , et al. April 21, 1
1987-04-21
Video memory controller
Grant 4,656,596 - Thaden , et al. April 7, 1
1987-04-07
Video serial accessed memory with midline load
Grant 4,648,077 - Pinkham , et al. March 3, 1
1987-03-03
Video display system using memory with parallel and serial access employing selectable cascaded serial shift registers
Grant 4,639,890 - Heilveil , et al. January 27, 1
1987-01-27
Use of implant process for programming ROM type processor for encryption
Grant 4,603,381 - Guttag July 29, 1
1986-07-29
Security bit for designating the security status of information stored in a nonvolatile memory
Grant 4,590,552 - Guttag , et al. May 20, 1
1986-05-20
Table lookup multiplier employing compressed data read only memory
Grant 4,566,075 - Guttag January 21, 1
1986-01-21
Single chip processor connected to an external memory chip
Grant 4,532,587 - Roskell , et al. July 30, 1
1985-07-30
Secure microprocessor/microcomputer with secured memory
Grant 4,521,853 - Guttag June 4, 1
1985-06-04
Data processing device formed on a single semiconductor substrate having secure memory
Grant 4,521,852 - Guttag June 4, 1
1985-06-04
Synchronizer circuit
Grant 4,469,964 - Guttag , et al. September 4, 1
1984-09-04
Psuedo-microprogramming in microprocessor in single-chip microprocessor with alternate IR loading from internal or external program memories
Grant 4,450,519 - Guttag , et al. May 22, 1
1984-05-22
Off-chip access for psuedo-microprogramming in microprocessor
Grant 4,434,462 - Guttag , et al. February 28, 1
1984-02-28
Microprocessor ALU with absolute value function
Grant 4,422,143 - Guttag December 20, 1
1983-12-20
Microprocessor which detects leading 1 bit of instruction to obtain microcode entry point address
Grant 4,403,284 - Sacarisen , et al. September 6, 1
1983-09-06
Microprocessor system with instruction pre-fetch
Grant 4,402,042 - Guttag August 30, 1
1983-08-30
Microprocessor with compressed control ROM
Grant 4,402,043 - Guttag , et al. August 30, 1
1983-08-30
Microprocessor with strip layout of busses, ALU and registers
Grant 4,402,044 - McDonough , et al. August 30, 1
1983-08-30
Video display processor
Grant 4,243,984 - Ackley , et al. January 6, 1
1981-01-06

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