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Patent applications and USPTO patent grants for Guruswamy; Mohankumar.The latest application filed is for "methods of placing transistors in a circuit layout and semiconductor device with automatically placed transistors".
Patent | Date |
---|---|
Methods of placing transistors in a circuit layout and semiconductor device with automatically placed transistors Grant 6,209,123 - Maziasz , et al. March 27, 2 | 2001-03-27 |
Method for optimizing contact pin placement in an integrated circuit Grant 6,075,934 - Chiluvuri , et al. June 13, 2 | 2000-06-13 |
Method of routing an integrated circuit Grant 6,006,024 - Guruswamy , et al. December 21, 1 | 1999-12-21 |
Automatic layout standard cell routing Grant 5,987,086 - Raman , et al. November 16, 1 | 1999-11-16 |
Apparatus and method for the automatic determination of a standard library height within an integrated circuit design Grant 5,737,236 - Maziasz , et al. April 7, 1 | 1998-04-07 |
Integrated circuit design and manufacturing method and an apparatus for designing an integrated circuit in accordance with the method Grant 5,689,432 - Blaauw , et al. November 18, 1 | 1997-11-18 |
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