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Patent applications and USPTO patent grants for Gupta; Shyam S..The latest application filed is for "system on a chip with interleaved sets of pads".
Patent | Date |
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System and method for determining power leakage of electronic circuit design Grant 8,793,641 - Roy , et al. July 29, 2 | 2014-07-29 |
System for performing electrical characterization of asynchronous integrated circuit interfaces Grant 8,521,463 - Jindal , et al. August 27, 2 | 2013-08-27 |
System on a chip with interleaved sets of pads Grant 8,476,768 - Kumar , et al. July 2, 2 | 2013-07-02 |
System On A Chip With Interleaved Sets Of Pads App 20130001790 - Kumar; Ajay ;   et al. | 2013-01-03 |
System For Performing Electrical Characterization Of Asynchronous Integrated Circuit Interfaces App 20120278027 - JINDAL; Deepak ;   et al. | 2012-11-01 |
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