Guinea; Jesus
Patent Applications and Registrations
Patent applications and USPTO patent grants for Guinea; Jesus.The latest application filed is for "delay locked loop circuit".
- Guinea; Jesus - Brembate IT
- Guinea; Jesus - Bergamo IT
- Guinea; Jesus - Verdellino IT
- Guinea; Jesus - Santa Clara CA
| Patent | Date |
|---|---|
| Equalizer Grant 7,154,945 - Guinea , et al. December 26, 2 | 2006-12-26 |
| Bidirectional synchronous interface with single time base Grant 7,106,822 - Guinea , et al. September 12, 2 | 2006-09-12 |
| Detector for detecting timing in a data flow Grant 7,023,943 - Guinea , et al. April 4, 2 | 2006-04-04 |
| Synchronism phase-switching circuit for the recovery of received data Grant 6,990,122 - Guinea , et al. January 24, 2 | 2006-01-24 |
| Delay locked loop circuit with convergence correction Grant 6,801,072 - Guinea , et al. October 5, 2 | 2004-10-05 |
| Input stage for a buffer with negative feed-back Grant 6,525,602 - Tomasini , et al. February 25, 2 | 2003-02-25 |
| Delay locked loop circuit App 20030006815 - Guinea, Jesus ; et al. | 2003-01-09 |
| Delay-locked loop circuit Grant 6,414,526 - Guinea , et al. July 2, 2 | 2002-07-02 |
| Voltage Generator In A Mos Integrated Circuit App 20020057128 - Tomasini, Luciano ; et al. | 2002-05-16 |
| Equalizer App 20010040921 - Guinea, Jesus ; et al. | 2001-11-15 |
| Synchronism phase-switching circuit for the recovery of received data App 20010040888 - Guinea, Jesus ; et al. | 2001-11-15 |
| Circuit system suitable for codifying NRZ type binary signals into CMI type binary signals App 20010030616 - Guinea, Jesus ; et al. | 2001-10-18 |
| Digital phase locked loop utilizing a multi-bit phase error input for control of a stepped clock generator Grant 5,056,054 - Wong , et al. October 8, 1 | 1991-10-08 |
| High resolution sample clock generator with deglitcher Grant 5,018,169 - Wong , et al. May 21, 1 | 1991-05-21 |
| Quotient phase-shift processor for digital phase-locked-loops Grant 4,862,485 - Guinea , et al. August 29, 1 | 1989-08-29 |
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