loadpatents
name:-0.15205097198486
name:-0.12249493598938
name:-0.026833057403564
Gu; Shiqun Patent Filings

Gu; Shiqun

Patent Applications and Registrations

Patent applications and USPTO patent grants for Gu; Shiqun.The latest application filed is for "multi-side power delivery in stacked memory packaging".

Company Profile
25.140.146
  • Gu; Shiqun - San Diego CA
  • - San Diego CA US
  • Gu; Shiqun - Vancouver WA
  • Gu; Shiqun - Urbana IL
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Multi-side Power Delivery In Stacked Memory Packaging
App 20220189901 - Gu; Shiqun ;   et al.
2022-06-16
Merged Power Pad For Improving Integrated Circuit Power Delivery
App 20220148988 - Gu; Shiqun ;   et al.
2022-05-12
Merged power pad for improving integrated circuit power delivery
Grant 11,233,025 - Gu , et al. January 25, 2
2022-01-25
Multi-Tier Processor/Memory Package
App 20210358894 - Gu; Shiqun ;   et al.
2021-11-18
Wrapped signal shielding in a wafer fanout package
Grant 11,101,224 - Gu , et al. August 24, 2
2021-08-24
IC Die to IC Die Interconnect Using Error Correcting Code and Data Path Interleaving
App 20210202447 - Gu; Shiqun
2021-07-01
Bottom package with metal post interconnections
Grant 10,971,476 - Gu , et al. April 6, 2
2021-04-06
Hybrid passive-on-glass (POG) acoustic filter
Grant 10,944,379 - Berdy , et al. March 9, 2
2021-03-09
Integrated circuits (ICs) on a glass substrate
Grant 10,903,240 - Gu , et al. January 26, 2
2021-01-26
Semiconductor package having reduced internal power pad pitch
Grant 10,672,730 - Gu , et al.
2020-06-02
Heterogenous 3D chip stack for a mobile processor
Grant 10,658,335 - Gu , et al.
2020-05-19
Glass substrate including passive-on-glass device and semiconductor die
Grant 10,523,253 - Yun , et al. Dec
2019-12-31
Integrated device comprising a capacitor and inductor structure comprising a shared interconnect for a capacitor and an inductor
Grant 10,498,307 - Velez , et al. De
2019-12-03
Semiconductor Package Having Reduced Internal Power Pad Pitch
App 20190273060 - Gu; Shiqun ;   et al.
2019-09-05
Integrated Circuits (ics) On A Glass Substrate
App 20190259780 - GU; Shiqun ;   et al.
2019-08-22
Integrated circuits (ICs) on a glass substrate
Grant 10,332,911 - Gu , et al.
2019-06-25
Package comprising switches and filters
Grant 10,312,193 - Gu , et al.
2019-06-04
Semiconductor package having reduced internal power pad pitch
Grant 10,304,792 - Gu , et al.
2019-05-28
Semiconductor Package Having Reduced Internal Power Pad Pitch
App 20190148323 - Gu; Shiqun ;   et al.
2019-05-16
Utilization of backside silicidation to form dual side contacted capacitor
Grant 10,290,579 - Goktepeli , et al.
2019-05-14
Monolithic integrated emitter-detector array in a flexible substrate for biometric sensing
Grant 10,271,745 - Gu , et al.
2019-04-30
Monolithic integration of antenna switch and diplexer
Grant 10,256,863 - Gu , et al.
2019-04-09
Integrated Device Comprising A Capacitor And Inductor Structure Comprising A Shared Interconnect For A Capacitor And An Inductor
App 20190081607 - VELEZ; Mario Francisco ;   et al.
2019-03-14
Multi-sensor device and method of using multi-sensor device for determining biometric properties of a subject
Grant 10,182,728 - Gu , et al. Ja
2019-01-22
Interposer device including at least one transistor and at least one through-substrate via
Grant 10,163,771 - Zuo , et al. Dec
2018-12-25
Heterogenous 3d Chip Stack For A Mobile Processor
App 20180366442 - Gu; Shiqun ;   et al.
2018-12-20
CMOS and bipolar device integration including a tunable capacitor
Grant 10,158,030 - Gu , et al. Dec
2018-12-18
High density fan out package structure
Grant 10,157,823 - Kim , et al. Dec
2018-12-18
Wrapped Signal Shielding In A Wafer Fanout Package
App 20180358303 - Gu; Shiqun ;   et al.
2018-12-13
Merged Power Pad For Improving Integrated Circuit Power Delivery
App 20180350762 - Gu; Shiqun ;   et al.
2018-12-06
Multi-density MIM capacitor for improved passive on glass (POG) multiplexer performance
Grant 10,141,908 - Mudakatte , et al. Nov
2018-11-27
Glass Substrate Including Passive-on-glass Device And Semiconductor Die
App 20180316374 - Yun; Changhan ;   et al.
2018-11-01
Backside ground plane for integrated circuit
Grant 10,103,135 - Zuo , et al. October 16, 2
2018-10-16
Cmos And Bipolar Device Integration Including A Tunable Capacitor
App 20180233604 - GU; Shiqun ;   et al.
2018-08-16
Glass substrate including passive-on-glass device and semiconductor die
Grant 10,044,390 - Yun , et al. August 7, 2
2018-08-07
Single-chip multi-frequency film bulk acoustic-wave resonators
Grant 10,038,422 - Yun , et al. July 31, 2
2018-07-31
Hybrid Passive-on-glass (pog) Acoustic Filter
App 20180167054 - BERDY; David Francis ;   et al.
2018-06-14
Systems and methods to reduce parasitic capacitance
Grant 9,941,156 - Gu , et al. April 10, 2
2018-04-10
Backside Ground Plane For Integrated Circuit
App 20180090475 - ZUO; Chengjie ;   et al.
2018-03-29
Electrode Wrap-around Capacitors For Radio Frequency (rf) Applications
App 20180083588 - YUN; Changhan Hobie ;   et al.
2018-03-22
Microelectromechanical system (MEMS) bond release structure and method of wafer transfer for three-dimensional integrated circuit (3D IC) integration
Grant 9,922,956 - Lan , et al. March 20, 2
2018-03-20
Utilization Of Backside Silicidation To Form Dual Side Contacted Capacitor
App 20180076137 - GOKTEPELI; Sinan ;   et al.
2018-03-15
Passives In Thin Film
App 20180077803 - YUN; Changhan Hobie ;   et al.
2018-03-15
Single-chip Multi-frequency Film Bulk Acoustic-wave Resonators
App 20180062617 - Yun; Changhan Hobie ;   et al.
2018-03-01
LOW PROFILE PASSIVE ON GLASS (PoG) DEVICE COMPRISING A DIE
App 20180061775 - Velez; Mario ;   et al.
2018-03-01
Multi-density Mim Capacitor For Improved Passive On Glass (pog) Multiplexer Performance
App 20180054177 - MUDAKATTE; Niranjan Sunil ;   et al.
2018-02-22
Package Comprising Switches And Filters
App 20180047673 - Gu; Shiqun ;   et al.
2018-02-15
Interposer Device Including At Least One Transistor And At Least One Through-substrate Via
App 20180040547 - Zuo; Chengjie ;   et al.
2018-02-08
Substrate block for PoP package
Grant 9,881,859 - We , et al. January 30, 2
2018-01-30
Glass Substrate Including Passive-on-glass Device And Semiconductor Die
App 20180026666 - Yun; Changhan ;   et al.
2018-01-25
Multi-Sensor Device And Method Of Using Multi-Sensor Device For Determining Biometric Properties Of A Subject
App 20170367594 - GU; Shiqun ;   et al.
2017-12-28
Systems And Methods For Providing Vertical Access To The Collector Of A Heterojunction Bipolar Transistor
App 20170373175 - GU; Shiqun ;   et al.
2017-12-28
Integrated circuit (IC) package comprising electrostatic discharge (ESD) protection
Grant 9,853,446 - Gu , et al. December 26, 2
2017-12-26
Monolithic Integrated Emitter-detector Array In A Flexible Substrate For Biometric Sensing
App 20170360316 - GU; Shiqun ;   et al.
2017-12-21
Utilization of backside silicidation to form dual side contacted capacitor
Grant 9,847,293 - Goktepeli , et al. December 19, 2
2017-12-19
Stacked package configurations and methods of making the same
Grant 9,799,628 - Kim , et al. October 24, 2
2017-10-24
Side-assembled passive devices
Grant 9,780,048 - Berdy , et al. October 3, 2
2017-10-03
Bondable device including a hydrophilic layer
Grant 9,773,741 - Gu , et al. September 26, 2
2017-09-26
FinFET capacitor circuit
Grant 9,768,161 - Zhang , et al. September 19, 2
2017-09-19
Integrated circuits (ICS) on a glass substrate
Grant 9,768,109 - Gu , et al. September 19, 2
2017-09-19
Monolithic Integration Of Antenna Switch And Diplexer
App 20170201291 - GU; Shiqun ;   et al.
2017-07-13
Integrated device comprising a capacitor that includes multiple pins and at least one pin that traverses a plate of the capacitor
Grant 9,704,796 - Gu , et al. July 11, 2
2017-07-11
Integrated device comprising flexible connector between integrated circuit (IC) packages
Grant 9,633,977 - We , et al. April 25, 2
2017-04-25
Integrated Circuits (ics) On A Glass Substrate
App 20170098663 - Gu; Shiqun ;   et al.
2017-04-06
Integrated Circuits (ics) On A Glass Substrate
App 20170084531 - Gu; Shiqun ;   et al.
2017-03-23
Integrated device package comprising silicon bridge in an encapsulation layer
Grant 9,595,496 - Lee , et al. March 14, 2
2017-03-14
Substrate with conductive vias
Grant 9,596,768 - We , et al. March 14, 2
2017-03-14
Integrated Circuit (ic) Package Comprising Electrostatic Discharge (esd) Protection
App 20170063079 - Gu; Shiqun ;   et al.
2017-03-02
Integrated device comprising stacked dies on redistribution layers
Grant 9,583,460 - Ray , et al. February 28, 2
2017-02-28
Metal-insulator-metal (MIM) capacitor in redistribution layer (RDL) of an integrated device
Grant 9,577,025 - Gu , et al. February 21, 2
2017-02-21
Anchoring Conductive Material In Semiconductor Devices
App 20170005160 - GU; Shiqun ;   et al.
2017-01-05
Devices, systems and methods using through silicon optical interconnects
Grant 9,478,528 - Kaskoun , et al. October 25, 2
2016-10-25
Systems And Methods To Reduce Parasitic Capacitance
App 20160293475 - Gu; Shiqun ;   et al.
2016-10-06
Stacked Package Configurations And Methods Of Making The Same
App 20160293574 - KIM; Dong Wook ;   et al.
2016-10-06
Integrated circuit chip customization using backside access
Grant 9,431,298 - Perry , et al. August 30, 2
2016-08-30
Air gap between tungsten metal lines for interconnects with reduced RC delay
Grant 9,425,096 - Gu , et al. August 23, 2
2016-08-23
Integrated device comprising high density interconnects in inorganic layers and redistribution layers in organic layers
Grant 9,418,877 - Gu , et al. August 16, 2
2016-08-16
Package-on-package (POP) structure including multiple dies
Grant 9,401,350 - We , et al. July 26, 2
2016-07-26
Interposer integrated with 3D passive devices
Grant 9,401,353 - Ramachandran , et al. July 26, 2
2016-07-26
Electrostatic discharge diodes and methods of forming electrostatic discharge diodes
Grant 9,379,201 - Ramachandran , et al. June 28, 2
2016-06-28
Integrated device package comprising bridge in litho-etchable layer
Grant 9,368,450 - Gu , et al. June 14, 2
2016-06-14
Magnetic tunnel junction (MTJ) storage element and spin transfer torque magnetoresistive random access memory (STT-MRAM) cells having an MTJ
Grant 9,368,716 - Gu , et al. June 14, 2
2016-06-14
Semiconductor package interconnections and method of making the same
Grant 9,355,963 - Kim , et al. May 31, 2
2016-05-31
Method for strain-relieved through substrate vias
Grant 9,355,904 - Ramachandran , et al. May 31, 2
2016-05-31
Semiconductor Package With Incorporated Inductance Element
App 20160133614 - GU; Shiqun ;   et al.
2016-05-12
Integrated Device Package Comprising Silicon Bridge In An Encapsulation Layer
App 20160133571 - Lee; Jae Sik ;   et al.
2016-05-12
High Density Fan Out Package Structure
App 20160126173 - KIM; Dong Wook ;   et al.
2016-05-05
Self-aligned top contact for MRAM fabrication
Grant 9,318,696 - Lu , et al. April 19, 2
2016-04-19
Microelectromechanical System (mems) Bond Release Structure And Method Of Wafer Transfer For Three-dimensional Integrated Circuit (3d Ic) Integration
App 20160093591 - LAN; Je-Hsiung Jeffrey ;   et al.
2016-03-31
Semiconductor Package Interconnections And Method Of Making The Same
App 20160093571 - KIM; Dong Wook ;   et al.
2016-03-31
Small form factor magnetic shield for magnetorestrictive random access memory (MRAM)
Grant 9,276,199 - Gu , et al. March 1, 2
2016-03-01
Load balancing scheme in multiple channel DRAM systems
Grant 9,268,720 - Wang , et al. February 23, 2
2016-02-23
Interposer Integrated With 3d Passive Devices
App 20160043068 - RAMACHANDRAN; Vidhya ;   et al.
2016-02-11
FinFET CIRCUIT
App 20160013180 - Zhang; Rongtian ;   et al.
2016-01-14
Air Gap Between Tungsten Metal Lines For Interconnects With Reduced Rc Delay
App 20160013133 - GU; Shiqun ;   et al.
2016-01-14
Integrated device comprising high density interconnects and redistribution layers
Grant 9,230,936 - Kim , et al. January 5, 2
2016-01-05
Integrating through substrate vias from wafer backside layers of integrated circuits
Grant 9,219,032 - Ramachandran , et al. December 22, 2
2015-12-22
Toroid inductor in redistribution layers (RDL) of an integrated device
Grant 9,209,131 - Gu , et al. December 8, 2
2015-12-08
Integrated circuit module with lead frame micro-needles
Grant 9,202,705 - Kaskoun , et al. December 1, 2
2015-12-01
Electrostatic Discharge Diode
App 20150333053 - Ramachandran; Vidhya ;   et al.
2015-11-19
SUBSTRATE BLOCK FOR PoP PACKAGE
App 20150325509 - We; Hong Bok ;   et al.
2015-11-12
Interconnect pillars with directed compliance geometry
Grant 9,184,144 - Bao , et al. November 10, 2
2015-11-10
Integrated Device Comprising High Density Interconnects In Inorganic Layers And Redistribution Layers In Organic Layers
App 20150318262 - Gu; Shiqun ;   et al.
2015-11-05
Semiconductor device having stacked memory elements and method of stacking memory elements on a semiconductor device
Grant 9,153,461 - Henderson , et al. October 6, 2
2015-10-06
FinFET compatible capacitor circuit
Grant 9,142,548 - Zhang , et al. September 22, 2
2015-09-22
Integrated circuit module with lead frame micro-needles
Grant 9,138,191 - Kaskoun , et al. September 22, 2
2015-09-22
Substrate With Conductive Vias
App 20150257282 - We; Hong Bok ;   et al.
2015-09-10
Integrated Device Comprising High Density Interconnects And Redistribution Layers
App 20150255416 - Kim; Dong Wook ;   et al.
2015-09-10
Self-aligned Top Contact For Mram Fabrication
App 20150249209 - LU; Yu ;   et al.
2015-09-03
Bottom Package With Metal Post Interconnections
App 20150235991 - Gu; Shiqun ;   et al.
2015-08-20
Integrated Device Comprising Stacked Dies On Redistribution Layers
App 20150235988 - Ray; Urmi ;   et al.
2015-08-20
Integrated Device Comprising Via With Side Barrier Layer Traversing Encapsulation Layer
App 20150228556 - Lee; Jae Sik ;   et al.
2015-08-13
Metal-insulator-metal (mim) Capacitor In Redistribution Layer (rdl) Of An Integrated Device
App 20150221714 - Gu; Shiqun ;   et al.
2015-08-06
Integrated Device Comprising A Substrate With Aligning Trench And/or Cooling Cavity
App 20150214127 - Gu; Shiqun ;   et al.
2015-07-30
Electrostatic discharge diode
Grant 9,093,462 - Ramachandran , et al. July 28, 2
2015-07-28
Toroid Inductor In Redistribution Layers (rdl) Of An Integrated Device
App 20150206837 - Gu; Shiqun ;   et al.
2015-07-23
System-in-package with interposer pitch adapter
Grant 9,087,765 - Chun , et al. July 21, 2
2015-07-21
Low-K dielectric protection spacer for patterning through substrate vias through a low-K wiring layer
Grant 9,059,263 - Ramachandran , et al. June 16, 2
2015-06-16
Semiconductor device having stacked memory elements and method of stacking memory elements on a semiconductor device
Grant 9,041,220 - Henderson , et al. May 26, 2
2015-05-26
Daisy chain connection for testing continuity in a semiconductor die
Grant 9,024,315 - Yao , et al. May 5, 2
2015-05-05
Semiconductor Device Having Stacked Memory Elements And Method Of Stacking Memory Elements On A Semiconductor Device
App 20150102509 - HENDERSON; Brian M. ;   et al.
2015-04-16
Active thermal control for stacked IC devices
Grant 8,987,062 - Gu , et al. March 24, 2
2015-03-24
Integrating through substrate vias into middle-of-line layers of integrated circuits
Grant 8,975,729 - Ramachandran , et al. March 10, 2
2015-03-10
Interposer With Electrostatic Discharge Protection
App 20150048497 - Henderson; Brian Matthew ;   et al.
2015-02-19
Small Form Factor Magnetic Shield For Magnetorestrictive Random Access Memory (mram)
App 20150048465 - Gu; Shiqun ;   et al.
2015-02-19
Small form factor magnetic shield for magnetorestrictive random access memory (MRAM)
Grant 8,952,504 - Gu , et al. February 10, 2
2015-02-10
Electrostatic Discharge Diode
App 20140327105 - Ramachandran; Vidhya ;   et al.
2014-11-06
Low Cost Interposer Comprising An Oxidation Layer
App 20140306349 - Gu; Shiqun ;   et al.
2014-10-16
Method For Strain-relieved Through Substrate Vias
App 20140302674 - RAMACHANDRAN; Vidhya ;   et al.
2014-10-09
Systems and methods for enabling ESD protection on 3-D stacked devices
Grant 8,847,360 - Kaskoun , et al. September 30, 2
2014-09-30
Daisy Chain Connection For Testing Continuity In A Semiconductor Die
App 20140264331 - Yao; Hongjun ;   et al.
2014-09-18
System-in-package With Interposer Pitch Adapter
App 20140264836 - Chun; Dexter Tamio ;   et al.
2014-09-18
Through-substrate Via With A Fuse Structure
App 20140266286 - Ramachandran; Vidhya ;   et al.
2014-09-18
Power Distribution And Thermal Solution For Direct Stacked Integrated Circuits
App 20140225248 - Henderson; Brian M. ;   et al.
2014-08-14
Dual Substrate, Power Distribution And Thermal Solution For Direct Stacked Integrated Devices
App 20140225246 - Henderson; Brian Matthew ;   et al.
2014-08-14
Semiconductor Device Having Stacked Memory Elements And Method Of Stacking Memory Elements On A Semiconductor Device
App 20140225280 - Henderson; Brian M. ;   et al.
2014-08-14
Small Form Factor Magnetic Shield For Magnetorestrictive Random Access Memory (mram)
App 20140225208 - Gu; Shiqun ;   et al.
2014-08-14
Semiconductor device and methods of making semiconductor device using graphene
Grant 8,796,741 - Gu , et al. August 5, 2
2014-08-05
Low cost die-to-wafer alignment/bond for 3d IC stacking
Grant 8,796,073 - Gu , et al. August 5, 2
2014-08-05
Structure and method for strain-relieved TSV
Grant 8,779,559 - Ramachandran , et al. July 15, 2
2014-07-15
Through Silicon Optical Interconnects
App 20140131549 - Kaskoun; Kenneth ;   et al.
2014-05-15
Voltage switchable dielectric for die-level electrostatic discharge (ESD) protection
Grant 8,691,707 - Gu , et al. April 8, 2
2014-04-08
FinFET CIRCUIT
App 20140061744 - Zhang; Ron ;   et al.
2014-03-06
Active Thermal Control For Stacked Ic Devices
App 20140043756 - Gu; Shiqun ;   et al.
2014-02-13
Voltage switchable dielectric for die-level electrostatic discharge (ESD) protection
Grant 8,633,562 - Gu , et al. January 21, 2
2014-01-21
Stt Mram Magnetic Tunnel Junction Architecture And Integration
App 20140015080 - Kang; Seung H. ;   et al.
2014-01-16
Integrating Through Substrate Vias From Wafer Backside Layers Of Integrated Circuits
App 20140008757 - Ramachandran; Vidhya ;   et al.
2014-01-09
Interconnect sensor for detecting delamination
Grant 08618539 -
2013-12-31
Corrosion control of stacked integrated circuits
Grant 8,618,670 - Gu , et al. December 31, 2
2013-12-31
Corrosion control of stacked integrated circuits
Grant 08618670 -
2013-12-31
Interconnect sensor for detecting delamination
Grant 8,618,539 - Henderson , et al. December 31, 2
2013-12-31
Reduced susceptibility to electrostatic discharge during 3D semiconductor device bonding and assembly
Grant 8,604,626 - Henderson , et al. December 10, 2
2013-12-10
Active thermal control for stacked IC devices
Grant 8,598,700 - Gu , et al. December 3, 2
2013-12-03
Voltage Switchable Dielectric For Die-level Electrostatic Discharge (esd) Protection
App 20130316526 - Gu; Shiqun ;   et al.
2013-11-28
Wide input/output memory with low density, low latency and high density, high latency blocks
Grant 8,595,429 - Gu , et al. November 26, 2
2013-11-26
Low Cost High Throughput Tsv/microbump Probe
App 20130297981 - Gu; Shiqun ;   et al.
2013-11-07
STT MRAM magnetic tunnel junction architecture and integration
Grant 8,564,079 - Kang , et al. October 22, 2
2013-10-22
Through substrate via with embedded decoupling capacitor
Grant 8,536,678 - Nowak , et al. September 17, 2
2013-09-17
Structure And Method For Strain-relieved Tsv
App 20130221494 - Ramachandran; Vidhya ;   et al.
2013-08-29
Three dimensional inductor, transformer and radio frequency amplifier
Grant 8,508,301 - Kim , et al. August 13, 2
2013-08-13
3-D integrated circuit lateral heat dissipation
Grant 8,502,373 - Kaskoun , et al. August 6, 2
2013-08-06
Integrating Through Substrate Vias Into Middle-of-line Layers Of Integrated Circuits
App 20130181330 - Ramachandran; Vidhya ;   et al.
2013-07-18
Conductive sidewall for microbumps
Grant 8,482,125 - Chandrasekaran , et al. July 9, 2
2013-07-09
Reduced Susceptibility To Electrostatic Discharge During 3d Semiconductor Device Bonding And Assembly
App 20130127046 - Henderson; Brian M. ;   et al.
2013-05-23
Low-k Dielectric Protection Spacer For Patterning Through Substrate Vias Through A Low-k Wiring Layer
App 20130113068 - Ramachandran; Vidhya ;   et al.
2013-05-09
Conductive Sidewall For Microbumps
App 20130105559 - Chandrasekaran; Arvind ;   et al.
2013-05-02
Predictive modeling of interconnect modules for advanced on-chip interconnect technology
Grant 8,429,577 - Li , et al. April 23, 2
2013-04-23
Monolithic 3-d Integration Using Graphene
App 20130082235 - Gu; Shiqun ;   et al.
2013-04-04
Multi-channel multi-port memory
Grant 8,380,940 - Wang , et al. February 19, 2
2013-02-19
Through Substrate Via With Embedded Decoupling Capacitor
App 20130040436 - Nowak; Matthew Michael ;   et al.
2013-02-14
Interconnect Pillars with Directed Compliance Geometry
App 20130020711 - Bao; Zhongping ;   et al.
2013-01-24
Techniques for placement of active and passive devices within a chip
Grant 8,350,358 - Kim , et al. January 8, 2
2013-01-08
Techniques for placement of active and passive devices within a chip
Grant 8,324,066 - Kim , et al. December 4, 2
2012-12-04
Through silicon via with embedded decoupling capacitor
Grant 8,294,240 - Nowak , et al. October 23, 2
2012-10-23
Voltage Switchable Dielectric for Die-Level Electrostatic Discharge (ESD) Protection
App 20120248582 - Gu; Shiqun ;   et al.
2012-10-04
Multiple power mode system and method for memory
Grant 8,230,239 - Wang , et al. July 24, 2
2012-07-24
Via structure integrated in electronic substrate
Grant 8,227,708 - Li , et al. July 24, 2
2012-07-24
Capacitive Mems-based Display With Touch Position Sensing
App 20120154333 - Gu; Shiqun ;   et al.
2012-06-21
Reduced susceptibility to electrostatic discharge during 3D semiconductor device bonding and assembly
Grant 8,198,736 - Henderson , et al. June 12, 2
2012-06-12
Integrated Circuit Chip Customization Using Backside Access
App 20120112312 - Perry; Daniel W. ;   et al.
2012-05-10
Three dimensional inductor and transformer
Grant 8,143,952 - Kim , et al. March 27, 2
2012-03-27
Systems and Methods for Enabling Esd Protection on 3-D Stacked Devices
App 20120061804 - Kaskoun; Kenneth ;   et al.
2012-03-15
Three Dimensional Inductor, Transformer and Radio Frequency Amplifier
App 20120056680 - Kim; Jonghae ;   et al.
2012-03-08
Load Balancing Scheme In Multiple Channel DRAM Systems
App 20120054423 - Wang; Feng ;   et al.
2012-03-01
Wide Input/Output Memory with Low Density, Low Latency and High Density, High Latency Blocks
App 20120054422 - Gu; Shiqun ;   et al.
2012-03-01
Non-Uniform Interleaving Scheme In Multiple Channel DRAM System
App 20120054455 - Wang; Feng ;   et al.
2012-03-01
Two mask MTJ integration for STT MRAM
Grant 8,125,040 - Kang , et al. February 28, 2
2012-02-28
Techniques for Placement of Active and Passive Devices within a Chip
App 20120040509 - Kim; Jonghae ;   et al.
2012-02-16
Reinforced Wafer-Level Molding to Reduce Warpage
App 20120025362 - Chandrasekaran; Arvind ;   et al.
2012-02-02
Conductive Sidewall for Microbumps
App 20120012998 - Chandrasekaran; Arvind ;   et al.
2012-01-19
Techniques for Placement of Active and Passive Devices within a Chip
App 20120001297 - Kim; Jonghae ;   et al.
2012-01-05
Dynamic Interleaving Of Multi-Channel Memory
App 20110320751 - Wang; Feng ;   et al.
2011-12-29
Multi-Channel Multi-Port Memory
App 20110320698 - Wang; Feng ;   et al.
2011-12-29
Systems and methods for enabling ESD protection on 3-D stacked devices
Grant 8,080,862 - Kaskoun , et al. December 20, 2
2011-12-20
IC interconnect
Grant 8,076,768 - Kaskoun , et al. December 13, 2
2011-12-13
Techniques for placement of active and passive devices within a chip
Grant 8,067,816 - Kim , et al. November 29, 2
2011-11-29
Selective Patterning for Low Cost through Vias
App 20110248405 - Li; Yiming ;   et al.
2011-10-13
Through Glass Via Manufacturing Process
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2011-09-22
Through-silicon Via Fabrication With Etch Stop Film
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2011-09-22
Semiconductor Device with Vias Having More Than One Material
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2011-08-25
Magnetic tunnel junction device with separate read and write paths
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2011-08-23
Systems and Methods Providing Arrangements of Vias
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2011-08-11
Surface Preparation of Die for Improved Bonding Strength
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2011-08-11
Method of fabricating via first plus via last IC interconnect
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2011-07-26
Via Structure Integrated in Electronic Substrate
App 20110139497 - Li; Xia ;   et al.
2011-06-16
Via first plus via last technique for IC interconnects
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2011-05-10
Interconnect Sensor for Detecting Delamination
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2011-05-05
Three Dimensional Inductor and Transformer
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2011-04-14
Memory cell and method of forming a magnetic tunnel junction (MTJ) of a memory cell
Grant 7,919,794 - Gu , et al. April 5, 2
2011-04-05
Self-aligned cell integration scheme
Grant 7,915,122 - Carter , et al. March 29, 2
2011-03-29
Techniques for precision pattern transfer of carbon nanotubes from photo mask to wafers
Grant 7,911,034 - Gu , et al. March 22, 2
2011-03-22
IC Interconnect
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2011-02-24
Barrier Layer On Polymer Passivation For Integrated Circuit Packaging
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2011-01-20
High Density MIM Capacitor Embedded in a Substrate
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2010-12-30
Stress Balance Layer on Semiconductor Wafer Backside
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2010-12-16
Through Silicon Via With Embedded Decoupling Capacitor
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2010-12-09
Via First Plus Via Last Technique for IC Interconnect
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2010-10-14
Reduced Susceptibility To Electrostatic Discharge During 3D Semiconductor Device Bonding and Assembly
App 20100258949 - Henderson; Brian M. ;   et al.
2010-10-14
Multiple Power Mode System and Method for Memory
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2010-10-07
Novel Method Of Air Gap Pattern For Advanced Back End Of Line (BOEL) Interconnect
App 20100206842 - Gu; Shiqun
2010-08-19
Photovoltaic Cell Efficiency Using Through Silicon Vias
App 20100206370 - Toms; Thomas R. ;   et al.
2010-08-19
Techniques for Placement of Active and Passive Devices Within a Chip
App 20100193905 - Kim; Jonghae ;   et al.
2010-08-05
Magnetic Tunnel Junction (MTJ) Storage Element and Spin Transfer Torque Magnetoresistive Random Access Memory (STT-MRAM) Cells Having an MJT
App 20100193888 - Gu; Shiqun ;   et al.
2010-08-05
Via First Plus Via Last Technique for IC Interconnects
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2010-06-17
Antenna Integrated in a Semiconductor Chip
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2010-05-27
Electrostatic Discharge (ESD) Shielding For Stacked ICs
App 20100091475 - Toms; Thomas R. ;   et al.
2010-04-15
Low Cost Die-To-Wafer Alignment/Bond For 3d IC Stacking
App 20100075460 - Gu; Shiqun ;   et al.
2010-03-25
Systems and Methods for Enabling ESD Protection on 3-D Stacked Devices
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2010-03-11
Capacitive MEMS-Based Display with Touch Position Sensing
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2010-02-25
Corrosion Control of Stacked Integrated Circuits
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2010-02-18
Active Thermal Control for Stacked IC Devices
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2009-12-31
Predictive Modeling of Interconnect Modules for Advanced On-Chip Interconnect Technology
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2009-12-31
Novel Techniques For Precision Pattern Transfer Of Carbon Nanotubes From Photo Mask To Wafers
App 20090294754 - GU; Shiqun ;   et al.
2009-12-03
3-D Integrated Circuit Lateral Heat Dissipation
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2009-11-05
STT MRAM Magnetic Tunnel Junction Architecture and Integration
App 20090261434 - Kang; Seung H. ;   et al.
2009-10-22
Two Mask MTJ Integration For STT MRAM
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2009-10-22
Memory Cell and Method of Forming a Magnetic Tunnel Junction (MTJ) of a Memory Cell
App 20090174015 - Gu; Shiqun ;   et al.
2009-07-09
Process and apparatus for simultaneous light and radical surface treatment of integrated circuit structure
Grant 7,553,772 - Gu , et al. June 30, 2
2009-06-30
Magnetic Tunnel Junction Device with Separate Read and Write Paths
App 20090161422 - Zhu; Xiaochun ;   et al.
2009-06-25
Techniques for precision pattern transfer of carbon nanotubes from photo mask to wafers
Grant 7,538,040 - Gu , et al. May 26, 2
2009-05-26
Superconductor wires for back end interconnects
Grant 7,341,978 - Gu , et al. March 11, 2
2008-03-11
Interconnect dielectric tuning
Grant 7,259,462 - Lo , et al. August 21, 2
2007-08-21
Novel techniques for precision pattern transfer of carbon nanotubes from photo mask to wafers
App 20070004191 - Gu; Shiqun ;   et al.
2007-01-04
Use selective growth metallization to improve electrical connection between carbon nanotubes and electrodes
App 20060292716 - Gu; Shiqun ;   et al.
2006-12-28
Self-aligned cell integration scheme
App 20060281256 - Carter; Richard J. ;   et al.
2006-12-14
Superconductor wires for back end interconnects
App 20060197193 - Gu; Shiqun ;   et al.
2006-09-07
Interconnect dielectric tuning
Grant 7,081,406 - Lo , et al. July 25, 2
2006-07-25
Interconnect dielectric tuning
App 20060035455 - Lo; Wai ;   et al.
2006-02-16
Method of reducing process plasma damage using optical spectroscopy
Grant 6,972,840 - Gu , et al. December 6, 2
2005-12-06
Method for preventing borderless contact to well leakage
Grant 6,893,937 - Gu , et al. May 17, 2
2005-05-17
Plasma treatment system
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2005-04-05
Plasma removal of high k metal oxide
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2005-03-24
Selective high k dielectrics removal
Grant 6,818,516 - Lo , et al. November 16, 2
2004-11-16
Plasma passivation
Grant 6,806,038 - Gu , et al. October 19, 2
2004-10-19
Method and apparatus for reducing microtrenching for borderless vias created in a dual damascene process
Grant 6,794,304 - Gu , et al. September 21, 2
2004-09-21
High-k dielectric bird's beak optimizations using in-situ O2 plasma oxidation
Grant 6,746,925 - Lin , et al. June 8, 2
2004-06-08
Method of reducing leakage using Si3N4 or SiON block dielectric films
Grant 6,743,669 - Lin , et al. June 1, 2
2004-06-01
Plasma passivation
App 20040005517 - Gu, Shiqun ;   et al.
2004-01-08
Method of reducing process plasma damage using optical spectroscopy
Grant 6,673,200 - Gu , et al. January 6, 2
2004-01-06
Plasma treatment system
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2002-12-12
Chalcogenide optical pumping system having broad emission band
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