Patent | Date |
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LDMOS finFET structure with buried insulator layer and method for forming same Grant 11,410,998 - Li , et al. August 9, 2 | 2022-08-09 |
Transistors with hybrid source/drain regions Grant 11,374,002 - Li , et al. June 28, 2 | 2022-06-28 |
Passive devices over polycrystalline semiconductor fins Grant 11,289,474 - Gu , et al. March 29, 2 | 2022-03-29 |
Finfet With Shorter Fin Height In Drain Region Than Source Region And Related Method App 20220052158 - Gu; Man ;   et al. | 2022-02-17 |
Transistors with an asymmetrical source and drain Grant 11,239,366 - Li , et al. February 1, 2 | 2022-02-01 |
Transistors With Hybrid Source/drain Regions App 20220028854 - Li; Wenjun ;   et al. | 2022-01-27 |
Ic Structure With Fin Having Subfin Extents With Different Lateral Dimensions App 20220005954 - Gu; Man ;   et al. | 2022-01-06 |
FinFET with shorter fin height in drain region than source region and related method Grant 11,211,453 - Gu , et al. December 28, 2 | 2021-12-28 |
Novel Gate Structure For An Ldmos Transistor Device App 20210351293 - Gu; Man ;   et al. | 2021-11-11 |
Passive devices over polycrystalline semiconductor fins App 20210327872 - Gu; Man ;   et al. | 2021-10-21 |
Integrated Circuit Structure Including Asymmetric, Recessed Source And Drain Region And Method For Forming Same App 20210273094 - Gu; Man ;   et al. | 2021-09-02 |
Ldmos Finfet Structure With Buried Insulator Layer And Method For Forming Same App 20210265342 - Li; Wenjun ;   et al. | 2021-08-26 |
Field-effect transistors with diffusion blocking spacer sections Grant 11,101,364 - Mulfinger , et al. August 24, 2 | 2021-08-24 |
Transistors With Asymmetrically-positioned Source/drain Regions App 20210249307 - Gu; Man ;   et al. | 2021-08-12 |
Transistors With An Asymmetrical Source And Drain App 20210242339 - Li; Wenjun ;   et al. | 2021-08-05 |
Epitaxial structures of a semiconductor device having a wide gate pitch Grant 10,971,625 - Aquilino , et al. April 6, 2 | 2021-04-06 |
Methods of forming source/drain regions of a FinFET device and the resulting structures Grant 10,964,598 - Liu , et al. March 30, 2 | 2021-03-30 |
Methods Of Forming Source/drain Regions Of A Finfet Device And The Resulting Structures App 20210020515 - Liu; Bingwu ;   et al. | 2021-01-21 |
Epitaxial Structures Of A Semiconductor Device Having A Wide Gate Pitch App 20200411689 - AQUILINO; MICHAEL V. ;   et al. | 2020-12-31 |
Formation of epi source/drain material on transistor devices and the resulting structures Grant 10,777,463 - Gu , et al. Sept | 2020-09-15 |
Field-effect Transistors With Diffusion Blocking Spacer Sections App 20200287019 - Mulfinger; George R. ;   et al. | 2020-09-10 |
Spacer with laminate liner Grant 10,755,918 - Gu , et al. A | 2020-08-25 |
Formation Of Epi Source/drain Material On Transistor Devices And The Resulting Structures App 20200227320 - Gu; Man ;   et al. | 2020-07-16 |
Spacer With Laminate Liner App 20200161122 - GU; Man ;   et al. | 2020-05-21 |
Semiconductor devices with robust low-k sidewall spacers and method for producing the same Grant 10,192,791 - Gu , et al. Ja | 2019-01-29 |
Laminated spacers for field-effect transistors Grant 10,008,456 - Han , et al. June 26, 2 | 2018-06-26 |