loadpatents
name:-0.022154808044434
name:-0.01957106590271
name:-0.0016310214996338
Gschwind; Michael Patent Filings

Gschwind; Michael

Patent Applications and Registrations

Patent applications and USPTO patent grants for Gschwind; Michael.The latest application filed is for "triggered sensor data capture in a mobile device environment".

Company Profile
1.23.19
  • Gschwind; Michael - Chappaqua NY
  • Gschwind; Michael - Yorktown NY
  • Gschwind; Michael - Danbury CT
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Triggered sensor data capture in a mobile device environment
Grant 10,878,947 - Chalas , et al. December 29, 2
2020-12-29
Method and apparatus for dynamically replacing legacy instructions with a single executable instruction utilizing a wide datapath
Grant 10,095,524 - Gschwind , et al. October 9, 2
2018-10-09
Tracking a user based on an electronic noise profile
Grant 9,997,050 - Gschwind , et al. June 12, 2
2018-06-12
Triggered Sensor Data Capture In A Mobile Device Environment
App 20180144100 - CHALAS; Kathleen ;   et al.
2018-05-24
Processing page fault exceptions in supervisory software when accessing strings and similar data structures using normal load instructions
Grant 9,703,721 - Gschwind , et al. July 11, 2
2017-07-11
Tracking A User Based On An Electronic Noise Profile
App 20170193797 - GSCHWIND; MICHAEL ;   et al.
2017-07-06
Computer instructions for limiting access violation reporting when accessing strings and similar data structures
Grant 9,690,509 - Gschwind , et al. June 27, 2
2017-06-27
Processing page fault exceptions in supervisory software when accessing strings and similar data structures using normal load instructions
Grant 9,678,886 - Gschwind , et al. June 13, 2
2017-06-13
Computer instructions for limiting access violation reporting when accessing strings and similar data structures
Grant 9,569,127 - Gschwind , et al. February 14, 2
2017-02-14
Processing Page Fault Exceptions In Supervisory Software When Accessing Strings And Similar Data Structures Using Normal Load Instructions
App 20160188483 - Gschwind; Michael ;   et al.
2016-06-30
Computer Instructions For Limiting Access Violation Reporting When Accessing Strings And Similar Data Structures
App 20160188242 - Gschwind; Michael ;   et al.
2016-06-30
Computer Instructions For Limiting Access Violation Reporting When Accessing Strings And Similar Data Structures
App 20160188496 - Gschwind; Michael ;   et al.
2016-06-30
Processing Page Fault Exceptions In Supervisory Software When Accessing Strings And Similar Data Structures Using Normal Load Instructions
App 20160188485 - Gschwind; Michael ;   et al.
2016-06-30
Method and apparatus for spatial register partitioning with a multi-bit cell register file
Grant 9,250,899 - Gschwind February 2, 2
2016-02-02
Method And Apparatus For The Dynamic Creation Of Instructions Utilizing A Wide Datapath
App 20150082009 - Gschwind; Michael ;   et al.
2015-03-19
Method and apparatus for the dynamic identification and merging of instructions for execution on a wide datapath
Grant 8,904,151 - Gschwind , et al. December 2, 2
2014-12-02
Method and apparatus for employing multi-bit register file cells and SMT thread groups
Grant 8,812,824 - Gschwind August 19, 2
2014-08-19
Compiling code for an enhanced application binary interface (ABI) with decode time instruction optimization
Grant 8,615,745 - Blainey , et al. December 24, 2
2013-12-24
Compiling Code For An Enhanced Application Binary Interface (abi) With Decode Time Instruction Optimization
App 20130086563 - Blainey; Robert J. ;   et al.
2013-04-04
Method and apparatus to extend the number of instruction bits in processors with fixed length instructions, in a manner compatible with existing code
Grant 7,865,699 - Altman , et al. January 4, 2
2011-01-04
Method and apparatus for detection of data errors in tag arrays
Grant 7,752,505 - Gschwind , et al. July 6, 2
2010-07-06
Method and apparatus for sharing storage and execution resources between architectural units in a microprocessor using a polymorphic function unit
Grant 7,725,682 - Gschwind , et al. May 25, 2
2010-05-25
Polymorphic branch predictor and method with selectable mode of prediction
Grant 7,523,298 - Gschwind April 21, 2
2009-04-21
Method and Apparatus for Detection of Data Errors in Tag Arrays
App 20090077425 - Gschwind; Michael ;   et al.
2009-03-19
Method And Apparatus For Employing Multi-bit Register File Cells And Smt Thread Groups
App 20080313437 - GSCHWIND; MICHAEL
2008-12-18
Method And Apparatus For Spatial Register Partitioning With A Multi-bit Cell Register File
App 20080313424 - GSCHWIND; MICHAEL
2008-12-18
Methods And Apparatus For Implementing Polymorphic Branch Predictors
App 20080307209 - Gschwind; Michael
2008-12-11
Method And Apparatus To Extend The Number Of Instruction Bits In Processors With Fixed Length Instructions, In A Manner Compatible With Existing Code
App 20080065861 - Altman; Erik R. ;   et al.
2008-03-13
Extending the number of instruction bits in processors with fixed length instructions, in a manner compatible with existing code
Grant 7,340,588 - Altman , et al. March 4, 2
2008-03-04
Polymorphic Branch Predictor And Method With Selectable Mode Of Prediction
App 20080005542 - Gschwind; Michael
2008-01-03
Method and apparatus for the dynamic creation of instructions utilizing a wide datapath
App 20070260855 - Gschwind; Michael ;   et al.
2007-11-08
Method and apparatus for sharing storage and execution resources between architectural units in a microprocessor using a polymorphic function unit
App 20070162726 - Gschwind; Michael ;   et al.
2007-07-12
Method and system for data-driven runtime alignment operation
App 20070011441 - Eichenberger; Alexandre E. ;   et al.
2007-01-11
Symmetric multi-processing system utilizing a DMAC to allow address translation for attached processors
Grant 6,907,477 - Altman , et al. June 14, 2
2005-06-14
Method and apparatus to extend the number of instruction bits in processors with fixed length instructions, in a manner compatible with existing code
App 20050114629 - Altman, Erik R. ;   et al.
2005-05-26
Symmetric multi-processing system with attached processing units being able to access a shared memory without being structurally configured with an address translation mechanism
Grant 6,779,049 - Altman , et al. August 17, 2
2004-08-17
Methods and apparatus for reordering and renaming memory references in a multiprocessor computer system
Grant 6,349,361 - Altman , et al. February 19, 2
2002-02-19

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