Grubisich; Michael J.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Grubisich; Michael J..The latest application filed is for "multiple seal-ring structure for the design, fabrication, and packaging of integrated circuits".

Company Profile

0.10.3

Grubisich; Michael J. - San Jose CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Multiple seal-ring structure for the design, fabrication, and packaging of integrated circuits Grant 9,209,137 - Vu , et al. December 8, 2	2015-12-08
Multiple Seal-ring Structure For The Design, Fabrication, And Packaging Of Integrated Circuits App 20140327115 - VU; Duc Anh ; et al.	2014-11-06
Multiple seal-ring structure for the design, fabrication, and packaging of integrated circuits Grant 8,785,246 - Vu , et al. July 22, 2	2014-07-22
Multiple Seal-ring Structure For The Design, Fabrication, And Packaging Of Integrated Circuits App 20140035106 - VU; Duc Anh ; et al.	2014-02-06
Digital process monitor Grant 6,668,346 - Schulz , et al. December 23, 2	2003-12-23
Fabrication of bipolar transistors using selective doping to improve performance characteristics Grant 5,698,459 - Grubisich , et al. December 16, 1	1997-12-16
Fabrication of bipolar transistors with improved output current-voltage characteristics Grant 5,589,409 - Bulucea , et al. December 31, 1	1996-12-31
Method of fabricating bipolar transistor having a guard ring Grant 5,580,798 - Grubisich December 3, 1	1996-12-03
Method of forming BICMOS structures Grant 5,455,189 - Grubisich October 3, 1	1995-10-03
Methods for fabrication of transistors Grant 5,389,553 - Grubisich , et al. February 14, 1	1995-02-14
Transistors with emitters having at least three sides Grant 5,387,813 - Iranmanesh , et al. February 7, 1	1995-02-07

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