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High Density Array, In Memory Computing
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Memory calibration device, system and method
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Tagged memory operated at lower vmin in error tolerant system
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High-density array, in memory computing
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Memory Management Device, System And Method
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Memory management device, system and method
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In-memory Compute Array With Integrated Bias Elements
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In-memory compute array with integrated bias elements
Grant 11,094,376 - Grover , et al. August 17, 2 | 2021-08-17 |
Streaming Access Memory Device, System And Method
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Memory Calibration Device, System And Method
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Computing System Power Management Device, System And Method
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Tagged Memory Operated At Lower Vmin In Error Tolerant System
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Memory Computing, High-density Array
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Memory Management Device, System And Method
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Elements For In-memory Compute
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In-memory Compute Array With Integrated Bias Elements
App 20200388330 - GROVER; Anuj ; et al. | 2020-12-10 |
Low voltage, master-slave flip-flop
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Low Voltage, Master-slave Flip-flop
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Low voltage, master-slave flip-flop
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SRAM cell and cell layout method
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Wide voltage range high performance sense amplifier
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SRAM Cell and Cell Layout Method
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Memory with an assist determination controller and associated methods
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Memory With An Assist Determination Controller And Associated Methods
App 20140293723 - Grover; Anuj ; et al. | 2014-10-02 |
Data-dependent pullup transistor supply and body bias voltage application for a static random access memory (SRAM) cell
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Data-dependent Pullup Transistor Supply And Body Bias Voltage Application For A Static Random Access Memory (sram) Cell
App 20140112081 - Grover; Anuj ; et al. | 2014-04-24 |
Low voltage write time enhanced SRAM cell and circuit extensions
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Low Voltage Write Time Enhanced Sram Cell And Circuit Extensions
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Sram Dimensioned To Provide Beta Ratio Supporting Read Stability And Reduced Write Time
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