loadpatents
name:-0.018064975738525
name:-0.0091509819030762
name:-0.0017759799957275
GROS-JEAN; Mickael Patent Filings

GROS-JEAN; Mickael

Patent Applications and Registrations

Patent applications and USPTO patent grants for GROS-JEAN; Mickael.The latest application filed is for "fefet transistor".

Company Profile
1.11.13
  • GROS-JEAN; Mickael - Grenoble FR
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
FeFET TRANSISTOR
App 20210280721 - GROS-JEAN; Mickael ;   et al.
2021-09-09
FeFET transistor
Grant 11,043,591 - Gros-Jean , et al. June 22, 2
2021-06-22
FeFET TRANSISTOR
App 20190386142 - GROS-JEAN; Mickael ;   et al.
2019-12-19
Back-illuminated integrated imaging device with simplified interconnect routing
Grant 9,685,475 - Guyader , et al. June 20, 2
2017-06-20
Optoelectronic device, in particular memory device
Grant 9,536,599 - Caubet , et al. January 3, 2
2017-01-03
Optoelectronic device, in particular memory device
Grant 9,530,489 - Caubet , et al. December 27, 2
2016-12-27
Optoelectronic Device, In Particular Memory Device
App 20160372183 - CAUBET; PIERRE ;   et al.
2016-12-22
Back-illuminated Integrated Imaging Device With Simplified Interconnect Routing
App 20160099278 - Guyader; Francois ;   et al.
2016-04-07
Optoelectronic Device, In Particular Memory Device
App 20150117128 - CAUBET; Pierre ;   et al.
2015-04-30
Method for manufacturing insulated-gate MOS transistors
Grant 8,878,331 - Gros-Jean , et al. November 4, 2
2014-11-04
Method for forming the gate insulator of a MOS transistor
Grant 8,802,575 - Gourhant , et al. August 12, 2
2014-08-12
Method for manufacturing and reoxidizing a TiN/Ta.sub.2O.sub.5/TiN capacitor
Grant 8,709,907 - Gros-Jean April 29, 2
2014-04-29
Method for manufacturing a polycrystalline dielectric layer
Grant 8,667,654 - Gros-Jean March 11, 2
2014-03-11
Method For Manufacturing A Polycrystalline Dielectric Layer
App 20140021586 - Gros-Jean; Mickael
2014-01-23
Method For Manufacturing Insulated-gate Mos Transistors
App 20130099329 - Gros-Jean; Mickael ;   et al.
2013-04-25
Method For Forming The Gate Insulator Of A Mos Transistor
App 20120270410 - Gourhant; Olivier ;   et al.
2012-10-25
Method For Manufacturing And Reoxidizing A Tin/ta2o5/tin Capacitor
App 20120199947 - Gros-Jean; Mickael
2012-08-09
Method For Manufacturing A Tin/ta2o5/tin Capacitor
App 20120200984 - GROS-JEAN; Mickael
2012-08-09
Method For Manufacturing A Polycrystalline Dielectric Layer
App 20120170170 - Gros-Jean; Mickael
2012-07-05
Deposition By Adsorption Under An Electrical Field
App 20080023436 - Gros-Jean; Mickael ;   et al.
2008-01-31
Process and device for producing a layer of tantalum pentoxide on a carrier material, in particular titanium nitride, and integrated circuit incorporating a layer of tantalum pentoxide
App 20040187778 - Gros-Jean, Mickael ;   et al.
2004-09-30

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