Grohoski; Gregory F.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Grohoski; Gregory F..The latest application filed is for "detection of multiple accesses to a row address of a dynamic memory within a refresh period".

Company Profile

0.55.27

Grohoski; Gregory F. - Bee Cave TX
Grohoski; Gregory F. - Austin TX
Grohoski; Gregory F. - Cedar Park TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Routing circuits for defect repair for a reconfigurable data processor Grant 11,409,540 - Grohoski , et al. August 9, 2	2022-08-09
Defect repair circuits for a reconfigurable data processor Grant 11,327,771 - Grohoski , et al. May 10, 2	2022-05-10
Detection of multiple accesses to a row address of a dynamic memory within a refresh period Grant 10,108,357 - Jeffrey , et al. October 23, 2	2018-10-23
Detection Of Multiple Accesses To A Row Address Of A Dynamic Memory Within A Refresh Period App 20160246525 - Jeffrey; David ; et al.	2016-08-25
Detection of multiple accesses to a row address of a dynamic memory within a refresh period Grant 9,355,689 - Jeffrey , et al. May 31, 2	2016-05-31
Apparatus and method for implementing instruction support for the camellia cipher algorithm Grant 9,317,286 - Olson , et al. April 19, 2	2016-04-19
Return address prediction in multithreaded processors Grant 9,213,551 - Shah , et al. December 15, 2	2015-12-15
System and method for balancing instruction loads between multiple execution units using assignment history Grant 9,122,487 - Golla , et al. September 1, 2	2015-09-01
Detection Of Multiple Accesses To A Row Address Of A Dynamic Memory Within A Refresh Period App 20150058549 - Jeffrey; David ; et al.	2015-02-26
Perceptron-based branch prediction mechanism for predicting conditional branch instructions on a multithreaded processor Grant 8,904,156 - Shah , et al. December 2, 2	2014-12-02
Apparatus and method for implementing instruction support for the data encryption standard (DES) algorithm Grant 8,654,970 - Olson , et al. February 18, 2	2014-02-18
Instruction support for performing montgomery multiplication Grant 8,583,902 - Olson , et al. November 12, 2	2013-11-12
Thread fairness on a multi-threaded processor with multi-cycle cryptographic operations Grant 8,560,814 - Golla , et al. October 15, 2	2013-10-15
Apparatus and method for implementing instruction support for performing a cyclic redundancy check (CRC) Grant 8,417,961 - Olson , et al. April 9, 2	2013-04-09
System and method to invalidate obsolete address translations Grant 8,412,911 - Grohoski , et al. April 2, 2	2013-04-02
Apparatus and method for local operand bypassing for cryptographic instructions Grant 8,356,185 - Olson , et al. January 15, 2	2013-01-15
Dynamic allocation of resources in a threaded, heterogeneous processor Grant 8,335,911 - Golla , et al. December 18, 2	2012-12-18
Low-latency Branch Target Cache App 20120290821 - Shah; Manish K. ; et al.	2012-11-15
System and method to manage address translation requests Grant 8,301,865 - Grohoski , et al. October 30, 2	2012-10-30
Return Address Prediction In Multithreaded Processors App 20120233442 - Shah; Manish K. ; et al.	2012-09-13
Instruction Support For Performing Stream Cipher App 20120216020 - Olson; Christopher H. ; et al.	2012-08-23
Methods and mechanisms to support multiple features for a number of opcodes Grant 8,195,923 - Spracklen , et al. June 5, 2	2012-06-05
APIC implementation for a highly-threaded x86 processor Grant 8,190,864 - Jordan , et al. May 29, 2	2012-05-29
Instruction Support For Performing Montgomery Multiplication App 20110276790 - Olson; Christopher H. ; et al.	2011-11-10
Thread Fairness On A Multi-threaded Processor With Multi-cycle Cryptographic Operations App 20110276783 - Golla; Robert T. ; et al.	2011-11-10
Apparatus And Method For Implementing Instruction Support For Performing A Cyclic Redundancy Check (crc) App 20110231636 - Olson; Christopher H. ; et al.	2011-09-22
Minimizing TLB comparison size Grant 7,937,556 - Jordan , et al. May 3, 2	2011-05-03
Perceptron-based Branch Prediction Mechanism For Predicting Conditional Branch Instructions On A Multithreaded Processor App 20110087866 - Shah; Manish K. ; et al.	2011-04-14
Apparatus And Method For Local Operand Bypassing For Cryptographic Instructions App 20110087895 - Olson; Christopher H. ; et al.	2011-04-14
Branch Prediction Mechanism For Predicting Indirect Branch Targets App 20110078425 - Shah; Manish K. ; et al.	2011-03-31
System and Method to Invalidate Obsolete Address Translations App 20100332786 - Grohoski; Gregory F. ; et al.	2010-12-30
System and Method to Manage Address Translation Requests App 20100332787 - Grohoski; Gregory F. ; et al.	2010-12-30
Instructions For Performing Data Encryption Standard (des) Computations Using General-purpose Registers App 20100329450 - Rarick; Leonard D. ; et al.	2010-12-30
System and Method for Balancing Instruction Loads Between Multiple Execution Units Using Assignment History App 20100325394 - Golla; Robert T. ; et al.	2010-12-23
Dynamic Allocation Of Resources In A Threaded, Heterogeneous Processor App 20100299499 - Golla; Robert T. ; et al.	2010-11-25
Methods And Mechanisms To Support Multiple Features For A Number Of Opcodes App 20100257338 - Spracklen; Lawrence A. ; et al.	2010-10-07
Apparatus And Method For Implementing Instruction Support For The Advanced Encryption Standard (aes) Algorithm App 20100250965 - Olson; Christopher H. ; et al.	2010-09-30
Apparatus And Method For Implementing Instruction Support For The Camellia Cipher Algorithm App 20100250964 - Olson; Christopher H. ; et al.	2010-09-30
Apparatus And Method For Implementing Instruction Support For The Kasumi Cipher Algorithm App 20100246815 - Olson; Christopher H. ; et al.	2010-09-30
Apparatus And Method For Implementing Instruction Support For The Data Encryption Standard (des) Algorithm App 20100246814 - Olson; Christopher H. ; et al.	2010-09-30
Enabling on-chip features via efuses Grant 7,795,899 - Grohoski , et al. September 14, 2	2010-09-14
Method and apparatus for precisely identifying effective addresses associated with hardware events Grant 7,779,238 - Kosche , et al. August 17, 2	2010-08-17
Register access protocol in a multihreaded multi-core processor Grant 7,747,771 - Shah , et al. June 29, 2	2010-06-29
Apparatus and method for implementing a hash algorithm word buffer Grant 7,720,219 - Olson , et al. May 18, 2	2010-05-18
Apparatus and method for cryptographic key expansion Grant 7,711,955 - Olson , et al. May 4, 2	2010-05-04
Performance instrumentation in a fine grain multithreaded multicore processor Grant 7,702,887 - Grohoski , et al. April 20, 2	2010-04-20
Multiple-core processor with flexible mapping of processor cores to cache banks Grant 7,685,354 - Hetherington , et al. March 23, 2	2010-03-23
Apparatus and method for implementing a unified hash algorithm pipeline Grant 7,684,563 - Olson , et al. March 23, 2	2010-03-23
Minimizing TLB Comparison Size App 20090327646 - Jordan; Paul J. ; et al.	2009-12-31
Processor including general-purpose and cryptographic functionality in which cryptographic operations are visible to user-specified software Grant 7,620,821 - Grohoski , et al. November 17, 2	2009-11-17
Apparatus and method for implementing a block cipher algorithm Grant 7,570,760 - Olson , et al. August 4, 2	2009-08-04
Multithreaded processor including a functional unit shared between multiple requestors and arbitration therefor Grant 7,533,248 - Golla , et al. May 12, 2	2009-05-12
Multithreaded processor having a source processor core to subsequently delay continued processing of demap operation until responses are received from each of remaining processor cores Grant 7,454,590 - Jordan , et al. November 18, 2	2008-11-18
Real-time address trace generation Grant 7,454,666 - Jordan , et al. November 18, 2	2008-11-18
Apparatus and method for fine-grained multithreading in a multipipelined processor core Grant 7,401,206 - Hetherington , et al. July 15, 2	2008-07-15
Methods and systems for efficiently integrating a cryptographic co-processor Grant 7,392,399 - Grohoski , et al. June 24, 2	2008-06-24
Hardware demapping of TLBs shared by multiple threads Grant 7,383,415 - Jordan , et al. June 3, 2	2008-06-03
Precise error handling in a fine grain multithreaded multicore processor Grant 7,370,243 - Grohoski , et al. May 6, 2	2008-05-06
Apparatus and method for sharing a functional unit execution resource among a plurality of functional units Grant 7,353,364 - Chong , et al. April 1, 2	2008-04-01
Synchronization primitives for flexible scheduling of functional unit operations Grant 7,320,063 - Grohoski , et al. January 15, 2	2008-01-15
Demapping TLBs across physical cores of a chip App 20070061548 - Jordan; Paul J. ; et al.	2007-03-15
Hardware demapping of TLBs shared by multiple threads App 20070061547 - Jordan; Paul J. ; et al.	2007-03-15
Method and apparatus for precisely identifying effective addresses associated with hardware events App 20070043531 - Kosche; Nicolai ; et al.	2007-02-22
Apparatus and method for fine-grained multithreading in a multipipelined processor core App 20060004995 - Hetherington; Ricky C. ; et al.	2006-01-05
Methods and systems for efficiently integrating a cryptographic co-processor App 20040225885 - Grohoski, Gregory F. ; et al.	2004-11-11
Crossbar switch apparatus and protocol Grant 5,555,543 - Grohoski , et al. September 10, 1	1996-09-10
Single cycle dispatch delay in a multiple instruction dispatch mechanism of a data processing system Grant 5,479,622 - Grohoski , et al. December 26, 1	1995-12-26
Parallel processor instruction dispatch apparatus with interrupt handler Grant 5,247,628 - Grohoski September 21, 1	1993-09-21
System for reducing delay in instruction execution by executing branch instructions in separate processor while dispatching subsequent instructions to primary processor Grant 5,127,091 - Boufarah , et al. June 30, 1	1992-06-30
Cache performance in an information handling system employing page searching Grant 5,077,826 - Grohoski , et al. December 31, 1	1991-12-31
Tightly coupled multiprocessor instruction synchronization Grant 5,075,840 - Grohoski , et al. December 24, 1	1991-12-24
Instruction control mechanism for a computing system with register renaming, map table and queues indicating available registers Grant 4,992,938 - Cocke , et al. February 12, 1	1991-02-12

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