Grochowski; Edward

Patent Applications and Registrations

Patent applications and USPTO patent grants for Grochowski; Edward.The latest application filed is for "method, system, and apparatus for page sizing extension".

Company Profile

7.31.28

Grochowski; Edward - San Jose US

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method, System, And Apparatus For Page Sizing Extension App 20210374069 - Grochowski; Edward ; et al.	2021-12-02
Method, System, And Apparatus For Page Sizing Extension App 20200242046 - Grochowski; Edward ; et al.	2020-07-30
Method and system to provide user-level multithreading Grant 10,635,438 - Grochowski , et al.	2020-04-28
Method and system to provide user-level multithreading Grant 10,628,153 - Grochowski , et al.	2020-04-21
Method and system to provide user-level multithreading Grant 10,613,858 - Grochowski , et al.	2020-04-07
Method and system to provide user-level multithreading Grant 10,585,667 - Grochowski , et al.	2020-03-10
Method, system, and apparatus for page sizing extension Grant 10,445,244 - Grochowski , et al. Oc	2019-10-15
Method, system, and apparatus for page sizing extension Grant 10,445,245 - Grochowski , et al. Oc	2019-10-15
Method And System To Provide User-level Multithreading App 20180321936 - Grochowski; Edward ; et al.	2018-11-08
Mechanism for instruction set based thread execution of a plurality of instruction sequencers Grant 9,990,206 - Wang , et al. June 5, 2	2018-06-05
Method, system, and apparatus for page sizing extension Grant 9,934,155 - Grochowski , et al. April 3, 2	2018-04-03
Method, System, And Apparatus For Page Sizing Extension App 20170199825 - Grochowski; Edward ; et al.	2017-07-13
Method, System, And Apparatus For Page Sizing Extension App 20170192904 - Grochowski; Edward ; et al.	2017-07-06
Adaptive optimized compare-exchange operation Grant 8,601,242 - Fryman , et al. December 3, 2	2013-12-03
Mechanism For Instruction Set Based Thread Execution Of A Plurality Of Instruction Sequencers App 20130219399 - Wang; Hong ; et al.	2013-08-22
Method, System, And Apparatus For Page Sizing Extension App 20130117531 - Grochowski; Edward ; et al.	2013-05-09
Method and apparatus for late timing transition detection Grant 8,125,246 - Grochowski , et al. February 28, 2	2012-02-28
Adaptive optimized compare-exchange operation App 20110154000 - Fryman; Joshua B. ; et al.	2011-06-23
Method And Apparatus For Late Timing Transition Detection App 20100052730 - Grochowski; Edward ; et al.	2010-03-04
Method and apparatus for late timing transition detection Grant 7,622,961 - Grochowski , et al. November 24, 2	2009-11-24
Method, system and apparatus for detecting and recovering from timing errors Grant 7,480,838 - Wilkerson , et al. January 20, 2	2009-01-20
Method and apparatus for varying energy per instruction according to the amount of available parallelism Grant 7,437,581 - Grochowski , et al. October 14, 2	2008-10-14
Method and apparatus for performing single-cycle addition or subtraction and comparison in redundant form arithmetic Grant 7,395,304 - Bhushan , et al. July 1, 2	2008-07-01
Circuit and method for protecting vector tags in high performance microprocessors Grant 7,315,920 - Quach , et al. January 1, 2	2008-01-01
Reducing aging effect on memory App 20070271421 - Kim; Nam Sung ; et al.	2007-11-22
Method and apparatus for late timing transition detection App 20070164787 - Grochowski; Edward ; et al.	2007-07-19
Method and apparatus for varying energy per instruction according to the amount of available parallelism App 20060095807 - Grochowski; Edward ; et al.	2006-05-04
Marking in history table instructions slowable/delayable for subsequent executions when result is not used immediately Grant 6,954,848 - Rakvic , et al. October 11, 2	2005-10-11
Cache-line reuse-buffer Grant 6,938,126 - Ramirez , et al. August 30, 2	2005-08-30
Circuit and method for protecting 1-hot and 2-hot vector tags in high performance microprocessors Grant 6,904,502 - Quach , et al. June 7, 2	2005-06-07
Circuit and method for protecting vector tags in high performance microprocessors App 20050120184 - Quach, Nhon ; et al.	2005-06-02
Circuit and method for protecting 1-hot and 2-hot vector tags in high performance microprocessors Grant 6,839,814 - Quach , et al. January 4, 2	2005-01-04
Method and apparatus for performing single-cycle addition or subtraction and comparison in redundant form arithmetic App 20040267863 - Bhushan, Bharat ; et al.	2004-12-30
Method and apparatus for a fast comparison in redundant form arithmetic Grant 6,826,588 - Bhushan , et al. November 30, 2	2004-11-30
Method and apparatus for performing equality comparison in redundant form arithmetic Grant 6,813,628 - Bhushan , et al. November 2, 2	2004-11-02
Circuit and method for protecting 1-hot and 2-hot vector tags in high performance microprocessors Grant 6,775,746 - Quach , et al. August 10, 2	2004-08-10
Circuit and method for protecting 1-hot and 2-hot vector tags in high performance microprocessors App 20040139280 - Quach, Nhon T. ; et al.	2004-07-15
Method and apparatus for performing single-cycle addition or subtraction and comparison in redundant form arithmetic Grant 6,763,368 - Bhushan , et al. July 13, 2	2004-07-13
Method and apparatus for performing subtraction in redundant form arithmetic Grant 6,754,689 - Bhushan , et al. June 22, 2	2004-06-22
Circuit and method for protecting 1-hot and 2-hot vector tags in high performance microprocessors App 20040078529 - Quach, Nhon T. ; et al.	2004-04-22
Circuit and method for protecting 1-hot and 2-hot vector tags in high performance microprocessors Grant 6,675,266 - Quach , et al. January 6, 2	2004-01-06
Circuit and method for protecting 1-hot and 2-hot vector tags in high performance microprocessors App 20030196049 - Quach, Nhon ; et al.	2003-10-16
Cache-line reuse-buffer App 20030196044 - Ramirez, Alejandro ; et al.	2003-10-16
Method and system to identify slowable instructions App 20030126412 - Rakvic, Ryan ; et al.	2003-07-03
Method and apparatus for performing equality comparison in redundant form arithmetic App 20020174157 - Bhushan, Bharat ; et al.	2002-11-21
Method and apparatus for a fast comparison in redundant form arithmetic App 20020147755 - Bhushan, Bharat ; et al.	2002-10-10
Circuit and method for protecting 1-hot and 2-hot vector tags in high performance microprocessors App 20020087808 - Quach, Nhon ; et al.	2002-07-04
Method and apparatus for performing single-cycle addition or subtraction and comparison in redundant form arithmetic App 20020013800 - Bhushan, Bharat ; et al.	2002-01-31
Method and apparatus for performing subtraction in redundant form arithmetic App 20010056454 - Bhushan, Bharat ; et al.	2001-12-27
Scheduling instructions with different latencies Grant 6,035,389 - Grochowski , et al. March 7, 2	2000-03-07
Method and apparatus for selecting instructions for simultaneous execution Grant 5,581,718 - Grochowski December 3, 1	1996-12-03
Rotators in machine instruction length calculation Grant 5,535,347 - Grochowski , et al. July 9, 1	1996-07-09
Boundary markers for indicating the boundary of a variable length instruction to facilitate parallel processing of sequential instructions Grant 5,450,605 - Grochowski , et al. September 12, 1	1995-09-12
Apparatus for generating computer clock pulses Grant 4,985,640 - Grochowski , et al. January 15, 1	1991-01-15

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