loadpatents
name:-0.22560405731201
name:-0.016628980636597
name:-0.0036020278930664
Gregorich; Thomas Matthew Patent Filings

Gregorich; Thomas Matthew

Patent Applications and Registrations

Patent applications and USPTO patent grants for Gregorich; Thomas Matthew.The latest application filed is for "flip chip package utilizing trace bump trace interconnection".

Company Profile
2.21.20
  • Gregorich; Thomas Matthew - San Diego CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Flip chip package utilizing trace bump trace interconnection
Grant 11,121,108 - Lin , et al. September 14, 2
2021-09-14
Flip Chip Package Utilizing Trace Bump Trace Interconnection
App 20200294948 - Lin; Tzu-Hung ;   et al.
2020-09-17
Flip chip package utilizing trace bump trace interconnection
Grant 10,707,183 - Lin , et al.
2020-07-07
Flip Chip Package Utilizing Trace Bump Trace Interconnection
App 20190295980 - Lin; Tzu-Hung ;   et al.
2019-09-26
Flip chip package utilizing trace bump trace interconnection
Grant 10,354,970 - Lin , et al. July 16, 2
2019-07-16
Semiconductor package
Grant 9,659,893 - Lin , et al. May 23, 2
2017-05-23
Semiconductor package with trace covered by solder resist
Grant 9,640,505 - Lin , et al. May 2, 2
2017-05-02
Enhanced flip chip structure using copper column interconnect
Grant 9,437,534 - Gregorich , et al. September 6, 2
2016-09-06
Integrated circuit package structure
Grant 9,437,512 - Gregorich , et al. September 6, 2
2016-09-06
Semiconductor Package
App 20150357291 - LIN; Tzu-Hung ;   et al.
2015-12-10
Semiconductor Package
App 20150348932 - LIN; Tzu-Hung ;   et al.
2015-12-03
Semiconductor package with solder resist capped trace to prevent underfill delamination
Grant 9,142,526 - Lin , et al. September 22, 2
2015-09-22
Enhanced Flip Chip Structure Using Copper Column Interconnect
App 20150249060 - Gregorich; Thomas Matthew ;   et al.
2015-09-03
Enhanced flip chip structure using copper column interconnect
Grant 9,064,757 - Gregorich , et al. June 23, 2
2015-06-23
Molded interposer package and method for fabricating the same
Grant 9,040,359 - Gregorich , et al. May 26, 2
2015-05-26
Molded interposer package and method for fabricating the same
Grant 8,957,518 - Gregorich , et al. February 17, 2
2015-02-17
Molded Interposer Package And Method For Fabricating The Same
App 20140377913 - GREGORICH; Thomas Matthew ;   et al.
2014-12-25
Molded interposer package and method for fabricating the same
Grant 8,859,340 - Gregorich , et al. October 14, 2
2014-10-14
Molded Interposer Package And Method For Fabricating The Same
App 20140127865 - GREGORICH; Thomas Matthew ;   et al.
2014-05-08
Semiconductor Package
App 20140091481 - LIN; Tzu-Hung ;   et al.
2014-04-03
Semiconductor package
Grant 8,633,588 - Lin , et al. January 21, 2
2014-01-21
Enhanced Flip Chip Structure Using Copper Column Interconnect
App 20130221536 - Gregorich; Thomas Matthew ;   et al.
2013-08-29
Package substrate for bump on trace interconnection
Grant 8,502,377 - Lin , et al. August 6, 2
2013-08-06
Molded Interposer Package And Method For Fabricating The Same
App 20130168857 - GREGORICH; Thomas Matthew ;   et al.
2013-07-04
Semiconductor Package
App 20130161810 - Lin; Tzu-Hung ;   et al.
2013-06-27
Flip Chip Package Utilizing Trace Bump Trace Interconnection
App 20130140694 - Lin; Tzu-Hung ;   et al.
2013-06-06
Integrated Circuit Package Structure
App 20130087911 - GREGORICH; Thomas Matthew ;   et al.
2013-04-11
Flip chip package utilizing trace bump trace interconnection
Grant 8,390,119 - Lin , et al. March 5, 2
2013-03-05
Printed Circuit Board (pcb) Assembly With Advanced Quad Flat No-lead (a-qfn) Package
App 20120140427 - GREGORICH; Thomas Matthew ;   et al.
2012-06-07
Package Substrate For Bump On Trace Interconnection
App 20120032343 - Lin; Tzu-Hung ;   et al.
2012-02-09
Flip Chip Package Utilizing Trace Bump Trace Interconnection
App 20120032322 - Lin; Tzu-Hung ;   et al.
2012-02-09

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed