Greer, III; Thomas H.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Greer, III; Thomas H..The latest application filed is for "clock and data recovery using receiver clock spread spectrum modulation and offset compensation".

Company Profile

1.16.9

Greer, III; Thomas H. - Chapel Hill NC
- Chapel Hill NC US

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Clock and data recovery using receiver clock spread spectrum modulation and offset compensation Grant 9,774,441 - Lee , et al. September 26, 2	2017-09-26
Clock and Data Recovery Using Receiver Clock Spread Spectrum Modulation and Offset Compensation App 20160330013 - Lee; Hae-Chang ; et al.	2016-11-10
Clock and data recovery using receiver clock spread spectrum modulation and offset compensation Grant 9,337,992 - Lee , et al. May 10, 2	2016-05-10
Clock and Data Recovery Using Receiver Clock Spread Spectrum Modulation and Offset Compensation App 20150312019 - Lee; Hae-Chang ; et al.	2015-10-29
Clock and data recovery using receiver clock spread spectrum modulation and offset compensation Grant 8,923,467 - Lee , et al. December 30, 2	2014-12-30
Clock and data recovery using receiver clock spread spectrum modulation and offset compensation Grant 08923467 -	2014-12-30
Clock and Data Recovery Employing Piece-Wise Estimation on the Derivative of the Frequency App 20130136220 - Lee; Hae-Chang ; et al.	2013-05-30
Clock and data recovery employing piece-wise estimation on the derivative of the frequency Grant 8,311,176 - Lee , et al. November 13, 2	2012-11-13
Hardware and method to test phase linearity of phase synthesizer Grant 8,155,174 - Kim , et al. April 10, 2	2012-04-10
Power supply noise rejection in PLL or DLL circuits Grant 8,111,093 - Poulton , et al. February 7, 2	2012-02-07
Power Supply Noise Rejection in PLL or DLL Circuits App 20110025385 - Poulton; John Wood ; et al.	2011-02-03
Processor-controlled clock-data recovery Grant 7,817,767 - Tell , et al. October 19, 2	2010-10-19
Power supply noise rejection in PLL or DLL circuits Grant 7,812,653 - Poulton , et al. October 12, 2	2010-10-12
Phase controlled oscillator circuit with input signal coupler Grant 7,786,816 - Dally , et al. August 31, 2	2010-08-31
Hardware and Method to Test Phase Linearity of Phase Synthesizer App 20100102868 - Kim; Jaeha ; et al.	2010-04-29
Clock And Data Recovery Employing Piece-wise Estimation On The Derivative Of The Frequency App 20100090732 - Lee; Hae-Chang ; et al.	2010-04-15
Pleisiochronous repeater system and components thereof Grant 7,664,166 - Palmer , et al. February 16, 2	2010-02-16
Power Supply Noise Rejection In Pll Or Dll Circuits App 20090231002 - Poulton; John Wood ; et al.	2009-09-17
Power supply noise rejection in PLL or DLL circuits Grant 7,501,867 - Poulton , et al. March 10, 2	2009-03-10
Phase Controlled Oscillator Circuit with Input Signal Coupler App 20090015340 - Dally; William J. ; et al.	2009-01-15
Phase controlled oscillator circuit with input signal coupler Grant 7,414,489 - Dally , et al. August 19, 2	2008-08-19
Wide-range multi-phase clock generator Grant 7,319,345 - Farjad-rad , et al. January 15, 2	2008-01-15
Phase controlled oscillator circuit with input signal coupler Grant 7,078,979 - Dally , et al. July 18, 2	2006-07-18
Phase controlled oscillator circuit with input signal coupler Grant 6,861,916 - Dally , et al. March 1, 2	2005-03-01
Phase controlled oscillator Grant 6,617,936 - Dally , et al. September 9, 2	2003-09-09

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