Greaves; Carlos A.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Greaves; Carlos A..The latest application filed is for "circuit for controlling data communication with synchronous storage circuitry and method of operation".

Company Profile

0.14.8

Greaves; Carlos A. - Austin TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Circuit For Controlling Data Communication With Synchronous Storage Circuitry And Method Of Operation App 20110006804 - Gay; James G. ; et al.	2011-01-13
Circuit for controlling data communication with synchronous storage circuitry and method of operation Grant 7,859,299 - Gay , et al. December 28, 2	2010-12-28
Network message filtering using hashing and pattern matching Grant 7,613,775 - Greaves , et al. November 3, 2	2009-11-03
Memory with serial input-output terminals for address and data and method therefor Grant 7,474,585 - Pelly , et al. January 6, 2	2009-01-06
Memory With Serial Input-output Terminals For Address And Data And Method Therefor App 20070211554 - Pelly; Perry H. ; et al.	2007-09-13
Cascadable level shifter cell Grant 7,268,588 - Sanchez , et al. September 11, 2	2007-09-11
Network message processing using inverse pattern matching Grant 7,240,041 - Martin , et al. July 3, 2	2007-07-03
Memory with serial input/output terminals for address and data and method therefor Grant 7,221,613 - Pelley , et al. May 22, 2	2007-05-22
High speed output buffer with AC-coupled level shift and DC level detection and correction Grant 7,183,817 - Sanchez , et al. February 27, 2	2007-02-27
Cascadable level shifter cell App 20070008001 - Sanchez; Hector ; et al.	2007-01-11
High speed output buffer with AC-coupled level shift and DC level detection and correction App 20070001716 - Sanchez; Hector ; et al.	2007-01-04
Fully programmable phase locked loop Grant 7,135,934 - Sanchez , et al. November 14, 2	2006-11-14
Fully programmable phase locked loop App 20060197608 - Sanchez; Hector ; et al.	2006-09-07
Memory with serial input/output terminals for address and data and method therefor App 20050276141 - Pelley, Perry H. ; et al.	2005-12-15
Network message filtering using hashing and pattern matching App 20050111446 - Greaves, Carlos A. ; et al.	2005-05-26
Network message processing using inverse pattern matching App 20050108943 - Martin, Harold M. ; et al.	2005-05-26
Single-chip software configurable transceiver for asymmetric communication system Grant 5,909,463 - Johnson , et al. June 1, 1	1999-06-01
Method and apparatus for frequency domain ripple compensation for a communications transmitter Grant 5,825,826 - May , et al. October 20, 1	1998-10-20
Method and apparatus for noise burst detection in a signal processor Grant 5,317,522 - Bonet , et al. May 31, 1	1994-05-31
Bandgap voltage reference circuit Grant 5,245,273 - Greaves , et al. September 14, 1	1993-09-14
Bandgap reference circuit with improved output reference voltage Grant 4,896,094 - Greaves , et al. January 23, 1	1990-01-23
Differential input-single output two pole filter implemented by a single amplifier Grant 4,782,305 - Westwick , et al. November 1, 1	1988-11-01

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