Graef; Stefan

Patent Applications and Registrations

Patent applications and USPTO patent grants for Graef; Stefan.The latest application filed is for "method and system for designing a probe card".

Company Profile

0.14.4

Graef; Stefan - Milpitas CA
Graef; Stefan - San Jose CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method and system for designing a probe card Grant 7,930,219 - Eldridge , et al. April 19, 2	2011-04-19
Method And System For Designing A Probe Card App 20100011334 - Eldridge; Benjamin N. ; et al.	2010-01-14
Method and system for designing a probe card Grant 7,593,872 - Eldridge , et al. September 22, 2	2009-09-22
Method And System For Designing A Probe Card App 20060294008 - Eldridge; Benjamin N. ; et al.	2006-12-28
Automated system for designing and testing a probe card Grant 7,092,902 - Eldridge , et al. August 15, 2	2006-08-15
Probe card designed by automated system App 20040181486 - Eldridge, Benjamin N. ; et al.	2004-09-16
Buffer cell insertion and electronic design automation Grant 6,766,499 - Mbouombouo , et al. July 20, 2	2004-07-20
Method and system for designing a probe card Grant 6,714,828 - Eldridge , et al. March 30, 2	2004-03-30
Utilizing a technology-independent system description incorporating a metal layer dependent attribute Grant 6,687,661 - Graef , et al. February 3, 2	2004-02-03
Delay/load estimation for use in integrated circuit design Grant 6,634,014 - Lindberg , et al. October 14, 2	2003-10-14
Static timing analysis validation tool for ASIC cores Grant 6,598,213 - Graef July 22, 2	2003-07-22
Integrated circuit having on-chip capacitors for supplying power to portions of the circuit requiring high-transient peak power Grant 6,546,538 - Rubdi , et al. April 8, 2	2003-04-08
Method and system for designing a probe card App 20030055736 - Eldridge, Benjamin N. ; et al.	2003-03-20
Cell interconnect delay library for integrated circuit design Grant 6,532,576 - Mbouombouo , et al. March 11, 2	2003-03-11
Method of selecting and synthesizing metal interconnect wires in integrated circuits Grant 6,189,131 - Graef , et al. February 13, 2	2001-02-13
Low impact signal buffering in integrated circuits Grant 6,184,711 - Graef , et al. February 6, 2	2001-02-06
Digital integrated circuit design system and methodology with hardware Grant 6,083,269 - Graef , et al. July 4, 2	2000-07-04
Semiconductor integrated circuit failure analysis using magnetic imaging Grant 6,064,220 - Sugasawara , et al. May 16, 2	2000-05-16

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