Graber; Joel J.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Graber; Joel J..The latest application filed is for "low power scan & delay test method and apparatus".

Company Profile

0.14.11

Graber; Joel J. - Richardson TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Delay testing capturing second response to first response as stimulus Grant 9,103,886 - Whetsel , et al. August 11, 2	2015-08-11
Low Power Scan & Delay Test Method And Apparatus App 20140157071 - Whetsel; Lee D. ; et al.	2014-06-05
Scan path delay testing with two memories and three subdivisions Grant 8,683,281 - Whetsel , et al. March 25, 2	2014-03-25
Low Power Scan & Delay Test Method And Apparatus App 20130097468 - Whetsel; Lee D. ; et al.	2013-04-18
Memory coupling scan input to first of scan path segments Grant 8,356,220 - Whetsel , et al. January 15, 2	2013-01-15
Low Power Scan & Delay Test Method And Apparatus App 20120204072 - Whetsel; Lee D. ; et al.	2012-08-09
Capturing response after simultaneously inputting last stimulus bit in scan path subdivisions Grant 8,185,789 - Whetsel , et al. May 22, 2	2012-05-22
Low Power Scan And Delay Test Method And Apparatus App 20110289371 - Whetsel; Lee D. ; et al.	2011-11-24
Segmented scan paths with cache bit memory inputs Grant 8,015,464 - Whetsel , et al. September 6, 2	2011-09-06
Adjusting output buffer timing based on drive strength Grant 7,795,918 - Graber September 14, 2	2010-09-14
Adjusting Output Buffer Timing Based on Drive Strength App 20090045845 - Graber; Joel J.	2009-02-19
Low Power Scan & Delay Test Method And Apparatus App 20080320351 - Whetsel; Lee D. ; et al.	2008-12-25
Response bits as stimulus in subdivided scan path delay test Grant 7,437,639 - Whetsel , et al. October 14, 2	2008-10-14
Programmable built in self test of memory Grant 7,325,178 - Damodaran , et al. January 29, 2	2008-01-29
Electrical fuse control of memory slowdown Grant 7,095,671 - Krishnan , et al. August 22, 2	2006-08-22
Electrical fuse control of memory slowdown App 20050213411 - Krishnan, Manjeri ; et al.	2005-09-29
Low power scan & delay test method and apparatus App 20050204228 - Whetsel, Lee D. ; et al.	2005-09-15
Electrical fuse control of memory slowdown Grant 6,928,011 - Krishnan , et al. August 9, 2	2005-08-09
Programmable built in self test of memory App 20050172180 - Damodaran, Raguram ; et al.	2005-08-04
IC with cache bit memory in series with scan segment Grant 6,898,749 - Whetsel , et al. May 24, 2	2005-05-24
Electrical fuse control of memory slowdown App 20050024960 - Krishnan, Manjeri ; et al.	2005-02-03
Low power scan & delay test method and apparatus App 20020035712 - Whetsel, Lee D. ; et al.	2002-03-21
Circuits, systems, and methods for uniquely identifying a microprocessor at the instruction set level employing one-time programmable register Grant 6,065,113 - Shiell , et al. May 16, 2	2000-05-16
Circuits, systems, and methods for external evaluation of microprocessor built-in self-test Grant 6,061,811 - Bondi , et al. May 9, 2	2000-05-09

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.