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name:-0.0039479732513428
name:-0.020411014556885
name:-0.00053119659423828
Gould; Scott Whitney Patent Filings

Gould; Scott Whitney

Patent Applications and Registrations

Patent applications and USPTO patent grants for Gould; Scott Whitney.The latest application filed is for "global voltage buffer for voltage islands".

Company Profile
0.19.2
  • Gould; Scott Whitney - South Burlington VT
  • Gould; Scott Whitney - Burlington VT
  • Gould; Scott Whitney - So. Burlington VT
  • Gould; Scott Whitney - S. Burlington VT
  • Gould; Scott Whitney - Chittenden VT
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
System and method for analyzing power distribution using static timing analysis
Grant 6,832,361 - Cohn , et al. December 14, 2
2004-12-14
Global voltage buffer for voltage islands
Grant 6,731,154 - Bednar , et al. May 4, 2
2004-05-04
Global voltage buffer for voltage islands
App 20030206051 - Bednar, Thomas Richard ;   et al.
2003-11-06
System and method for analyzing power distribution using static timing analysis
App 20020174409 - Cohn, John Maxwell ;   et al.
2002-11-21
Field programmable memory array
Grant 6,233,191 - Gould , et al. May 15, 2
2001-05-15
Programmable address decoder for field programmable memory array
Grant 6,130,854 - Gould , et al. October 10, 2
2000-10-10
Method of operating a field programmable memory array with a field programmable gate array
Grant 6,118,707 - Gould , et al. September 12, 2
2000-09-12
Field programmable memory array
Grant 6,075,745 - Gould , et al. June 13, 2
2000-06-13
Selective connectivity between memory sub-arrays and a hierarchical bit line structure in a memory array
Grant 6,023,421 - Clinton , et al. February 8, 2
2000-02-08
Testable programmable gate array and associated LSSD/deterministic test methodology
Grant 6,021,513 - Beebe , et al. February 1, 2
2000-02-01
Field programmable memory array
Grant 5,949,719 - Clinton , et al. September 7, 1
1999-09-07
Method and system for layout and schematic generation for heterogeneous arrays
Grant 5,910,733 - Bertolet , et al. June 8, 1
1999-06-08
Testable programmable gate array and associated LSSD/deterministic test methodology
Grant 5,867,507 - Beebe , et al. February 2, 1
1999-02-02
Function generator for programmable gate array
Grant 5,760,611 - Gould June 2, 1
1998-06-02
Field programmable gate arrays using semi-hard multicell macros
Grant 5,761,078 - Fuller , et al. June 2, 1
1998-06-02
Method and system for programming a gate array using a compressed configuration bit stream
Grant 5,745,734 - Craft , et al. April 28, 1
1998-04-28
Programmable array interconnect latch
Grant 5,732,246 - Gould , et al. March 24, 1
1998-03-24
System for enhanced drive in programmable gate arrays
Grant 5,694,057 - Gould December 2, 1
1997-12-02
Programmable array I/O-routing resource
Grant 5,671,432 - Bertolet , et al. September 23, 1
1997-09-23
Programmable array clock/reset resource
Grant 5,652,529 - Gould , et al. July 29, 1
1997-07-29
Programmable logic cell having configurable gates and multiplexers
Grant 5,646,546 - Bertolet , et al. July 8, 1
1997-07-08

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