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Patent applications and USPTO patent grants for Gort; Marcel.The latest application filed is for "fpga neighbor output mux direct connections to minimize routing hops".
Patent | Date |
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Fpga Neighbor Output Mux Direct Connections To Minimize Routing Hops App 20220272026 - Gort; Marcel ;   et al. | 2022-08-25 |
Fpga Inter-tile Control Signal Sharing App 20220271754 - Gort; Marcel ;   et al. | 2022-08-25 |
Dynamic Fpga Logic Capacity Based On Accurate Early Routability Estimation App 20220245315 - Gort; Marcel ;   et al. | 2022-08-04 |
Dynamic Block Size Carry-skip Adder Construction On Fpgas By Combining Ripple Carry Adders With Routable Propagate/generate Signals App 20220244912 - Gort; Marcel | 2022-08-04 |
Adding Lut Fracturabiliy To Fpga 4-luts Using Existing Adder Circuitry App 20220247413 - Gort; Marcel | 2022-08-04 |
Chained Programmable Delay Elements App 20220247397 - Gort; Marcel | 2022-08-04 |
Fast Fpga Interconnect Stitching For Wire Highways App 20220247412 - Gort; Marcel ;   et al. | 2022-08-04 |
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