Gordin; Rachel
Patent Applications and Registrations
Patent applications and USPTO patent grants for Gordin; Rachel.The latest application filed is for "nested helical inductor".
- Gordin; Rachel - Hadera IL
- Gordin; Rachel - Haifa N/A IL
- Gordin; Rachel - Hedera IL
| Patent | Date |
|---|---|
| Integrated helical multi-layer inductor structures Grant 9,397,042 - Brunschwiler , et al. July 19, 2 | 2016-07-19 |
| Nested-helical Transformer App 20150371763 - Gordin; Rachel ; et al. | 2015-12-24 |
| Nested Helical Inductor App 20150371764 - Gordin; Rachel ; et al. | 2015-12-24 |
| Stacked through-silicon via (TSV) transformer structure Grant 9,111,933 - Carpenter , et al. August 18, 2 | 2015-08-18 |
| Coil inductor for on-chip or on-chip stack Grant 9,105,627 - Shapiro , et al. August 11, 2 | 2015-08-11 |
| Integrated helical multi-layer inductor structures App 20150206838 - BRUNSCHWILER; THOMAS J. ; et al. | 2015-07-23 |
| Layout determining for wide wire on-chip interconnect lines Grant 8,943,456 - Gordin , et al. January 27, 2 | 2015-01-27 |
| Method and system for design and modeling of vertical interconnects for 3DI applications Grant 8,793,637 - Gordin , et al. July 29, 2 | 2014-07-29 |
| Method And System For Design And Modeling Of Vertical Interconnects For 3di Applications App 20130318490 - Gordin; Rachel ; et al. | 2013-11-28 |
| Stacked Through-Silicon Via (TSV) Transformer Structure App 20130307656 - Carpenter; Gary D. ; et al. | 2013-11-21 |
| Method and system for design and modeling of vertical interconnects for 3DI applications Grant 8,448,119 - Gordin , et al. May 21, 2 | 2013-05-21 |
| Coil Inductor For On-chip Or On-chip Stack App 20130113448 - SHAPIRO; MICHAEL J. ; et al. | 2013-05-09 |
| Topologies and methodologies for AMS integrated circuit design Grant 8,347,244 - Alon , et al. January 1, 2 | 2013-01-01 |
| Method and system for design and modeling of transmission lines Grant 8,271,913 - Carmon , et al. September 18, 2 | 2012-09-18 |
| Capacitance modeling Grant 8,056,043 - Gordin , et al. November 8, 2 | 2011-11-08 |
| Capacitance modeling Grant 8,041,546 - Gordin , et al. October 18, 2 | 2011-10-18 |
| Layout Determining For Wide Wire On-chip Interconnect Lines App 20110179392 - Gordin; Rachel ; et al. | 2011-07-21 |
| Method And System For Design And Modeling Of Transmission Lines App 20110072408 - Carmon; Roi ; et al. | 2011-03-24 |
| Method and system for design and modeling of transmission lines Grant 7,797,662 - Carmon , et al. September 14, 2 | 2010-09-14 |
| Topologies and Methodologies for AMS Integrated Circuit Design App 20090150848 - Alon; Amir ; et al. | 2009-06-11 |
| Interconnect-aware methodology for integrated circuit design Grant 7,454,733 - Alon , et al. November 18, 2 | 2008-11-18 |
| Capacitance Modeling App 20080243453 - Gordin; Rachel ; et al. | 2008-10-02 |
| Capacitance Modeling App 20080244485 - Gordin; Rachel ; et al. | 2008-10-02 |
| Method And System For Design And Modeling Of Transmission Lines App 20080184182 - Carmon; Roi ; et al. | 2008-07-31 |
| System and method of modelling capacitance of on-chip coplanar transmission line structures over a substrate Grant 7,392,490 - Gordin , et al. June 24, 2 | 2008-06-24 |
| Interconnect-aware integrated circuit design Grant 7,080,340 - Goren , et al. July 18, 2 | 2006-07-18 |
| Device and method for reducing dishing of critical on-chip interconnect lines App 20060072257 - Gordin; Rachel ; et al. | 2006-04-06 |
| Capacitance modeling App 20050262458 - Gordin, Rachel ; et al. | 2005-11-24 |
| Interconnect-aware integrated circuit design App 20050114819 - Goren, David ; et al. | 2005-05-26 |
| Interconnect-aware methodology for integrated circuit design App 20030172358 - Alon, Amir ; et al. | 2003-09-11 |
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