loadpatents
name:-0.02936577796936
name:-0.018358945846558
name:-0.0093221664428711
Gopalan; Mahesh Patent Filings

Gopalan; Mahesh

Patent Applications and Registrations

Patent applications and USPTO patent grants for Gopalan; Mahesh.The latest application filed is for "double data rate (ddr) memory controller apparatus and method".

Company Profile
8.17.22
  • Gopalan; Mahesh - Milpitas CA
  • Gopalan; Mahesh - Bangalore N/A IN
  • Gopalan; Mahesh - Sunnyvale CA
  • Gopalan; Mahesh - San Jose CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Double Data Rate (ddr) Memory Controller Apparatus And Method
App 20220254403 - Gopalan; Mahesh ;   et al.
2022-08-11
Double data rate (DDR) memory controller apparatus and method
Grant 11,348,632 - Gopalan , et al. May 31, 2
2022-05-31
Double Data Rate (ddr) Memory Controller Apparatus And Method
App 20200321044 - Gopalan; Mahesh ;   et al.
2020-10-08
Double data rate (DDR) memory controller apparatus and method
Grant 10,734,061 - Gopalan , et al.
2020-08-04
Double data rate (DDR) memory controller apparatus and method
Grant 10,586,585 - Gopalan , et al.
2020-03-10
Double Data Rate (ddr) Memory Controller Apparatus And Method
App 20200020381 - Gopalan; Mahesh ;   et al.
2020-01-16
Double Data Rate (ddr) Memory Controller Apparatus And Method
App 20190206479 - Gopalan; Mahesh ;   et al.
2019-07-04
Double data rate (DDR) memory controller apparatus and method
Grant 10,269,408 - Gopalan , et al.
2019-04-23
Double data rate (DDR) memory controller apparatus and method
Grant 10,242,730 - Gopalan , et al.
2019-03-26
Method for calibrating capturing read data in a read data path for a DDR memory interface circuit
Grant 10,229,729 - Gopalan , et al.
2019-03-12
Double Data Rate (ddr) Memory Controller Apparatus And Method
App 20180336942 - Gopalan; Mahesh ;   et al.
2018-11-22
Double Data Rate (ddr) Memory Controller Apparatus And Method
App 20180277195 - Gopalan; Mahesh ;   et al.
2018-09-27
Method For Calibrating Capturing Read Data In A Read Data Path For A Ddr Memory Interface Circuit
App 20180211699 - Gopalan; Mahesh ;   et al.
2018-07-26
Method for calibrating capturing read data in a read data path for a DDR memory interface circuit
Grant 10,032,502 - Gopalan , et al. July 24, 2
2018-07-24
Method For Calibrating Capturing Read Data In A Read Data Path For A Ddr Memory Interface Circuit
App 20180033477 - GOPALAN; Mahesh ;   et al.
2018-02-01
Multiple gating modes and half-frequency dynamic calibration for DDR memory controllers
Grant 9,805,784 - Gopalan , et al. October 31, 2
2017-10-31
Circuit for dynamically adaptive bit-leveling by incremental sampling, jitter detection, and exception handling
Grant 9,584,309 - Gopalan February 28, 2
2017-02-28
Multiple Gating Modes and Half-Frequency Dynamic Calibration for DDR Memory Controllers
App 20160365135 - GOPALAN; Mahesh ;   et al.
2016-12-15
Circuit For Dynamically Adaptive Bit-leveling By Incremental Sampling, Jitter Detection, And Exception Handling
App 20160254903 - Gopalan; Mahesh
2016-09-01
Multiple gating modes and half-frequency dynamic calibration for DDR memory controllers
Grant 9,431,091 - Gopalan , et al. August 30, 2
2016-08-30
Methods for dynamically adaptive bit-leveling by incremental sampling, jitter detection, and exception handling
Grant 9,300,443 - Gopalan March 29, 2
2016-03-29
Multiple Gating Modes and Half-Frequency Dynamic Calibration for DDR Memory Controllers
App 20160035409 - GOPALAN; Mahesh ;   et al.
2016-02-04
Circuits For Dynamically Adaptive Bit-leveling By Sweep Sampling With Automatic Jitter Avoidance
App 20150006980 - Gopalan; Mahesh
2015-01-01
Methods For Dynamically Adaptive Bit-leveling By Sweep Sampling With Automatic Jitter Avoidance
App 20140372787 - Gopalan; Mahesh
2014-12-18
Methods For Dynamically Adaptive Bit-leveling By Incremental Sampling, Jitter Detection, And Exception Handling
App 20140281666 - Gopalan; Mahesh
2014-09-18
Dynamically Adaptive Bit-leveling For Data Interfaces
App 20140281662 - Gopalan; Mahesh
2014-09-18
Time application having an intergrated check engine
Grant 8,661,356 - Demant , et al. February 25, 2
2014-02-25
Integrated Environment For Software Design And Implementation
App 20120060141 - DEMANT; HILMAR ;   et al.
2012-03-08
Design Time Application Having An Intergrated Check Engine
App 20120054659 - Demant; Hilmar ;   et al.
2012-03-01
Dynamic Property Attributes
App 20120030612 - Aziz; Abdul ;   et al.
2012-02-02
DDR memory controller
Grant 7,975,164 - Lee , et al. July 5, 2
2011-07-05
Networked processor for a pipeline architecture
Grant 7,877,581 - Mukund , et al. January 25, 2
2011-01-25
DDR memory controller
App 20090307521 - Lee; Jung ;   et al.
2009-12-10
Method and apparatus for a pipeline architecture
Grant 7,571,258 - Mukund , et al. August 4, 2
2009-08-04
Method and apparatus for aligning operands for a processor
Grant 7,320,013 - Mukund , et al. January 15, 2
2008-01-15
Networked processor for a pipeline architecture
App 20050099841 - Mukund, Shridhar ;   et al.
2005-05-12
Method and apparatus for aligning operands for a processor
App 20040210610 - Mukund, Shridhar ;   et al.
2004-10-21
Method and apparatus for a pipeline architecture
App 20040153494 - Mukund, Shridhar ;   et al.
2004-08-05

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed