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Patent applications and USPTO patent grants for Gont; Val.The latest application filed is for "method of design analysis of existing integrated circuits".
Patent | Date |
---|---|
Method of design analysis of existing integrated circuits Grant 7,873,203 - Zavadsky , et al. January 18, 2 | 2011-01-18 |
Method of design analysis of existing integrated circuits Grant 7,643,665 - Zavadsky , et al. January 5, 2 | 2010-01-05 |
Method of design analysis of existing integrated circuits Grant 7,580,557 - Zavadsky , et al. August 25, 2 | 2009-08-25 |
Method of Design Analysis of Existing Integrated Circuits App 20080317328 - Zavadsky; Vyacheslav L. ;   et al. | 2008-12-25 |
Method of Design Analysis of Existing Integrated Circuits App 20080317327 - Zavadsky; Vyacheslav L. ;   et al. | 2008-12-25 |
Net-list organization tools App 20070256037 - Zavadsky; Vyacheslav L. ;   et al. | 2007-11-01 |
Method and apparatus for reducing redundant data in a layout data structure Grant 7,278,121 - Aitnouri , et al. October 2, 2 | 2007-10-02 |
Method and apparatus for locating short circuit faults in an integrated circuit layout Grant 7,207,018 - Zavadsky , et al. April 17, 2 | 2007-04-17 |
Advanced schematic editor Grant 7,013,028 - Gont , et al. March 14, 2 | 2006-03-14 |
Method of design analysis of existing integrated circuits App 20060045325 - Zavadsky; Vyacheslav L. ;   et al. | 2006-03-02 |
Method and apparatus for reducing redundant data in a layout data structure App 20060041849 - Aitnouri; Elmehdi ;   et al. | 2006-02-23 |
Method and apparatus for locating short circuit faults in an integrated circuit layout App 20060031792 - Zavadsky; Vyacheslav L. ;   et al. | 2006-02-09 |
Schematic organization tool Grant 6,738,957 - Gont , et al. May 18, 2 | 2004-05-18 |
Schematic organization tool App 20020023107 - Gont, Val ;   et al. | 2002-02-21 |
Advanced schematic editor App 20020018583 - Gont, Val ;   et al. | 2002-02-14 |
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