loadpatents
name:-0.061340093612671
name:-0.061007022857666
name:-0.0039548873901367
Gomm; Tyler Patent Filings

Gomm; Tyler

Patent Applications and Registrations

Patent applications and USPTO patent grants for Gomm; Tyler.The latest application filed is for "clock signal and supply voltage variation tracking".

Company Profile
1.51.52
  • Gomm; Tyler - Meridian ID
  • Gomm; Tyler - Boise ID
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Clock circuits and apparatus containing such
Grant 10,355,698 - Gomm , et al. July 16, 2
2019-07-16
Clock signal and supply voltage variation tracking
Grant 10,193,558 - Ma , et al. Ja
2019-01-29
Clock signal and supply voltage variation tracking
Grant 9,813,067 - Ma , et al. November 7, 2
2017-11-07
Clock Signal And Supply Voltage Variation Tracking
App 20170288682 - Ma; Yantao ;   et al.
2017-10-05
Apparatuses, methods, and circuits including a delay circuit
Grant 9,584,140 - Ma , et al. February 28, 2
2017-02-28
Two-stage phase mixer circuit
Grant 9,531,364 - Ma , et al. December 27, 2
2016-12-27
Clock Signal And Supply Voltage Variation Tracking
App 20160365860 - Ma; Yantao ;   et al.
2016-12-15
Two-stage Phase Mixer Circuit
App 20160277015 - MA; YANTAO ;   et al.
2016-09-22
Apparatus and methods for delay line testing
Grant 9,335,372 - Van De Graaff , et al. May 10, 2
2016-05-10
Apparatuses and methods for compensating for power supply sensitivities of a circuit in a clock path
Grant 9,331,702 - Ma , et al. May 3, 2
2016-05-03
Continuous high-frequency event filter
Grant 9,154,141 - Gomm , et al. October 6, 2
2015-10-06
Apparatuses And Methods For Compensating For Power Supply Sensitivities Of A Circuit In A Clock Path
App 20150162919 - MA; YANTAO ;   et al.
2015-06-11
Power savings mode for memory systems
Grant 9,041,446 - Blodgett , et al. May 26, 2
2015-05-26
Method, Circuit And System For Detecting A Locked State Of A Clock Synchronization Circuit
App 20150130521 - Gomm; Tyler ;   et al.
2015-05-14
Apparatuses, Methods, And Circuits Including A Delay Circuit
App 20150102844 - MA; YANTAO ;   et al.
2015-04-16
Apparatuses and methods for compensating for power supply sensitivities of a circuit in a clock path
Grant 8,988,955 - Ma , et al. March 24, 2
2015-03-24
Apparatus And Methods For Delay Line Testing
App 20140375329 - Van De Graaff; Scott ;   et al.
2014-12-25
Apparatuses, methods, and circuits including a delay circuit
Grant 8,917,132 - Ma , et al. December 23, 2
2014-12-23
Clock Circuits And Apparatus Containing Such
App 20140293713 - Gomm; Tyler ;   et al.
2014-10-02
Apparatuses, Methods, And Circuits Including A Delay Circuit
App 20140253198 - Ma; Yantao ;   et al.
2014-09-11
Apparatuses and Methods for Compensating for Power Supply Sensitivities of a Circuit in a Clock Path
App 20140240013 - Ma; Yantao ;   et al.
2014-08-28
Apparatuses and methods for compensating for power supply sensitivities of a circuit in a clock path
Grant 8,717,835 - Ma , et al. May 6, 2
2014-05-06
Control of a variable delay line using line entry point to modify line power supply voltage
Grant 8,587,354 - Gomm , et al. November 19, 2
2013-11-19
Methods, apparatuses, and circuits for bimodal disable circuits
Grant 8,519,767 - Booth , et al. August 27, 2
2013-08-27
Methods, Apparatuses, And Circuits For Bimodal Disable Circuits
App 20130163713 - Booth; Eric ;   et al.
2013-06-27
Apparatuses And Methods For Compensating For Power Supply Sensitivities Of A Circuit In A Clock Path
App 20130051166 - Ma; Yantao ;   et al.
2013-02-28
Delay lines, methods for delaying a signal, and delay lock loops
Grant 8,368,448 - Gomm February 5, 2
2013-02-05
Apparatus and method for trimming static delay of a synchronizing circuit
Grant 8,339,167 - Gomm , et al. December 25, 2
2012-12-25
Clock generator and methods using closed loop duty cycle correction
Grant 8,324,946 - Becker , et al. December 4, 2
2012-12-04
Duty Cycle Corrector Circuits
App 20120274376 - Gomm; Tyler ;   et al.
2012-11-01
Delay Lines, Methods For Delaying A Signal, And Delay Lock Loops
App 20120223755 - Gomm; Tyler
2012-09-06
Power Savings Mode For Memory Systems
App 20120201090 - Blodgett; Greg A. ;   et al.
2012-08-09
Method and apparatus for synchronizing with a clock signal
Grant 8,217,694 - Gomm , et al. July 10, 2
2012-07-10
Power savings mode for memory systems
Grant 8,164,368 - Blodgett , et al. April 24, 2
2012-04-24
Delay lines, methods for delaying a signal, and delay lock loops
Grant 8,149,034 - Gomm April 3, 2
2012-04-03
Continous High-frequency Event Filter
App 20120051493 - Gomm; Tyler ;   et al.
2012-03-01
Clock Generator And Methods Using Closed Loop Duty Cycle Correction
App 20110298504 - Becker; Eric ;   et al.
2011-12-08
Continuous high-frequency event filter
Grant 8,073,890 - Gomm , et al. December 6, 2
2011-12-06
Control of a Variable Delay Line Using Line Entry Point to Modify Line Power Supply Voltage
App 20110254604 - Gomm; Tyler ;   et al.
2011-10-20
Clock generator and methods using closed loop duty cycle correction
Grant 8,018,261 - Becker , et al. September 13, 2
2011-09-13
Control of a variable delay line using line entry point to modify line power supply voltage
Grant 7,973,577 - Gomm , et al. July 5, 2
2011-07-05
Apparatus And Method For Trimming Static Delay Of A Synchronizing Circuit
App 20110134712 - Gomm; Tyler ;   et al.
2011-06-09
Delay Lines, Methods For Delaying A Signal, And Delay Lock Loops
App 20110102029 - GOMM; TYLER
2011-05-05
Method And Apparatus For Synchronizing With A Clock Signal
App 20110057698 - Gomm; Tyler ;   et al.
2011-03-10
Apparatus and method for trimming static delay of a synchronizing circuit
Grant 7,898,308 - Gomm , et al. March 1, 2
2011-03-01
Delay lines, methods for delaying a signal, and delay lock loops
Grant 7,872,507 - Gomm January 18, 2
2011-01-18
Methods and apparatus for synchronizing with a clock signal
Grant 7,812,657 - Gomm , et al. October 12, 2
2010-10-12
Duty cycle error calculation circuit for a clock generator having a delay locked loop and duty cycle correction circuit
Grant 7,791,388 - Gomm September 7, 2
2010-09-07
Delay Lines, Methods For Delaying A Signal, And Delay Lock Loops
App 20100182058 - GOMM; Tyler
2010-07-22
Apparatus And Method For Trimming Static Delay Of A Synchronizing Circuit
App 20100135090 - GOMM; TYLER ;   et al.
2010-06-03
Trimmable delay locked loop circuitry with improved initialization characteristics
Grant 7,728,639 - Gomm , et al. June 1, 2
2010-06-01
Apparatus and method for trimming static delay of a synchronizing circuit
Grant 7,671,647 - Gomm , et al. March 2, 2
2010-03-02
Clock generator and methods using closed loop duty cycle correction
App 20090243677 - Becker; Eric ;   et al.
2009-10-01
Control of a Variable Delay Line Using Line Entry Point to Modify Line Power Supply Voltage
App 20090206898 - Gomm; Tyler ;   et al.
2009-08-20
Control of a variable delay line using line entry point to modify line power supply voltage
Grant 7,541,851 - Gomm , et al. June 2, 2
2009-06-02
Methods And Apparatus For Synchronizing With A Clock Signal
App 20090115479 - Gomm; Tyler ;   et al.
2009-05-07
Trimmable Delay Locked Loop Circuitry With Improved Initialization Characteristics
App 20090027094 - Gomm; Tyler ;   et al.
2009-01-29
Graduated delay line for increased clock skew correction circuit operating range
Grant 7,471,130 - Gomm , et al. December 30, 2
2008-12-30
Duty Cycle Error Calculation Circuit For A Clock Generator Having A Delay Locked Loop And Duty Cycle Correction Circuit
App 20080315930 - Gomm; Tyler
2008-12-25
Trimmable delay locked loop circuitry with improved initialization characteristics
Grant 7,443,216 - Gomm , et al. October 28, 2
2008-10-28
Duty cycle error calculation circuit for a clock generator having a delay locked loop and duty cycle correction circuit
Grant 7,423,465 - Gomm September 9, 2
2008-09-09
Fast response time, low power phase detector circuits, devices and systems incorporating the same, and associated methods
Grant 7,423,456 - Gomm , et al. September 9, 2
2008-09-09
Trimmable Delay Locked Loop Circuitry with Improved Initialization Characteristics
App 20080197899 - Gomm; Tyler ;   et al.
2008-08-21
Control of a Variable Delay Line Using Line Entry Point to Modify Line Power Supply Voltage
App 20080136475 - Gomm; Tyler ;   et al.
2008-06-12
Fast response time, low power phase detector circuits, devices and systems incorporating the same, and associated methods
App 20080130396 - Gomm; Tyler ;   et al.
2008-06-05
Delay circuit with reset-based forward path static delay
Grant 7,276,947 - Becker , et al. October 2, 2
2007-10-02
Method, circuit and system for detecting a locked state of a clock synchronization circuit
App 20070205817 - Gomm; Tyler ;   et al.
2007-09-06
Continuous high-frequency event filter
App 20070194821 - Gomm; Tyler ;   et al.
2007-08-23
Initialization scheme for a reduced-frequency, fifty percent duty cycle corrector
Grant 7,259,604 - Gomm August 21, 2
2007-08-21
System and method for reduced power open-loop synthesis of output clock signals having a selected phase relative to an input clock signal
Grant 7,253,672 - Gomm , et al. August 7, 2
2007-08-07
Duty cycle error calculation circuit for a clock generator having a delay locked loop and duty cycle correction circuit
App 20070176659 - Gomm; Tyler
2007-08-02
Synchronous clock generator including duty cycle correction
Grant 7,250,798 - Deivasigamani , et al. July 31, 2
2007-07-31
Apparatus and method for trimming static delay of a synchronizing circuit
App 20070171760 - Gomm; Tyler ;   et al.
2007-07-26
Circuit and method for operating a delay-lock loop in a power saving manner
Grant 7,218,568 - Smith , et al. May 15, 2
2007-05-15
Measure-initialized delay locked loop with live measurement
Grant 7,212,053 - Gomm , et al. May 1, 2
2007-05-01
Synchronous clock generator including duty cycle correction
Grant 7,208,989 - Deivasigamani , et al. April 24, 2
2007-04-24
Circuit and method for operating a delay-lock loop in a power saving manner
Grant 7,177,208 - Smith , et al. February 13, 2
2007-02-13
Initialization scheme for a reduced-frequency, fifty percent duty cycle corrector
App 20070030754 - Gomm; Tyler
2007-02-08
Graduated delay line for increased clock skew correction circuit operating range
App 20060261869 - Gomm; Tyler ;   et al.
2006-11-23
Delay circuit with reset-based forward path static delay
App 20060261871 - Becker; Eric ;   et al.
2006-11-23
Measure-initialized delay locked loop with live measurement
App 20060255843 - Gomm; Tyler ;   et al.
2006-11-16
Circuit and method for operating a delay-lock loop in a power saving manner
App 20060250877 - Smith; Scott ;   et al.
2006-11-09
Delay circuit with reset-based forward path static delay
Grant 7,126,393 - Becker , et al. October 24, 2
2006-10-24
Power savings mode for memory systems
App 20060233036 - Blodgett; Greg A. ;   et al.
2006-10-19
Circuit and method for operating a delay-lock loop in a power saving manner
App 20060221759 - Smith; Scott ;   et al.
2006-10-05
Synchronous clock generator including duty cycle correction
Grant 7,116,143 - Deivasigamani , et al. October 3, 2
2006-10-03
Delay-lock loop and method having high resolution and wide dynamic range
App 20060214710 - Gomm; Tyler ;   et al.
2006-09-28
Synchronous clock generator including duty cycle correction
App 20060209620 - Deivasigamani; Vinoth Kumar ;   et al.
2006-09-21
System and method for reduced power open-loop synthesis of output clock signals having a selected phase relative to an input clock signal
App 20060202729 - Gomm; Tyler ;   et al.
2006-09-14
Synchronous clock generator including duty cycle correction
App 20060202732 - Deivasigamani; Vinoth Kumar ;   et al.
2006-09-14
System and method for reduced power open-loop synthesis of output clock signals having a selected phase relative to an input clock signal
Grant 7,078,951 - Gomm , et al. July 18, 2
2006-07-18
Synchronous clock generator including duty cycle correction
App 20060145745 - Deivasigamani; Vinoth Kumar ;   et al.
2006-07-06
Delay-lock loop and method having high resolution and wide dynamic range
App 20060044032 - Gomm; Tyler ;   et al.
2006-03-02
System and method for reduced power open-loop synthesis of output clock signals having a selected phase relative to an input clock signal
App 20060044037 - Gomm; Tyler ;   et al.
2006-03-02
Delay circuit with reset-based forward path static delay
App 20060038597 - Becker; Eric ;   et al.
2006-02-23

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed