loadpatents
name:-0.010882139205933
name:-0.0085508823394775
name:-0.0006101131439209
Goldberg; Cindy Patent Filings

Goldberg; Cindy

Patent Applications and Registrations

Patent applications and USPTO patent grants for Goldberg; Cindy.The latest application filed is for "graphene capped hemt device".

Company Profile
0.9.9
  • Goldberg; Cindy - Cold Spring NY US
  • Goldberg; Cindy - Montobonnot FR
  • Goldberg; Cindy - Austin TX
  • Goldberg; Cindy - Montbonnot FR
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Endpoint detector for a semiconductor processing station and associated methods
Grant 9,002,493 - Zhang , et al. April 7, 2
2015-04-07
Graphene capped HEMT device
Grant 8,987,780 - Zhang , et al. March 24, 2
2015-03-24
Graphene Capped Hemt Device
App 20140353722 - Zhang; John H. ;   et al.
2014-12-04
System and method of combining damascenes and subtract metal etch for advanced back end of line interconnections
Grant 8,900,990 - Zhang , et al. December 2, 2
2014-12-02
System And Method Of Combining Damascenes And Subtract Metal Etch For Advanced Back End Of Line Interconnections
App 20140183735 - ZHANG; John H. ;   et al.
2014-07-03
Endpoint Detector For A Semiconductor Processing Station And Associated Methods
App 20130218316 - ZHANG; John H. ;   et al.
2013-08-22
Copper interconnect structure having a graphene cap
Grant 8,476,765 - Zhang , et al. July 2, 2
2013-07-02
Copper Interconnect Structure Having A Graphene Cap
App 20120139114 - Zhang; John Hongguang ;   et al.
2012-06-07
Precise Real Time And Position Low Pressure Control Of Chemical Mechanical Polish (cmp) Head
App 20120122373 - Zhang; John H. ;   et al.
2012-05-17
Semiconductor wafer with low-K dielectric layer and process for fabrication thereof
Grant 7,994,069 - Smith , et al. August 9, 2
2011-08-09
Semiconductor device including a coupled dielectric layer and metal layer, method of fabrication thereor, and material for coupling a dielectric layer and a metal layer in a semiconductor device
Grant 7,951,729 - Farkas , et al. May 31, 2
2011-05-31
Semiconductor device including a coupled dielectric layer and metal layer, method of fabrication thereof, and material for coupling a dielectric layer and a metal layer in a semiconductor device
Grant 7,691,756 - Farkas , et al. April 6, 2
2010-04-06
Integrated System For Semiconductor Substrate Processing Using Liquid Phase Metal Deposition
App 20090301867 - Farkas; Janos ;   et al.
2009-12-10
Wafer And Method Of Forming Alignment Markers
App 20090134496 - Warrick; Scott ;   et al.
2009-05-28
Semiconductor Wafer With Low-K Dielectric Layer and Process For Fabrication Thereof
App 20080182379 - Smith; Brad ;   et al.
2008-07-31

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed