Patent | Date |
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Cladding layer epitaxy via template engineering for heterogeneous integration on silicon Grant 10,693,008 - Mukherjee , et al. | 2020-06-23 |
Selective epitaxially grown III-V materials based devices Grant 10,573,717 - Goel , et al. Feb | 2020-02-25 |
Making a defect free fin based device in lateral epitaxy overgrowth region Grant 10,475,706 - Goel , et al. Nov | 2019-11-12 |
Techniques to achieve area reduction through co-optimizing logic core blocks and memory redundancies Grant 10,268,122 - Bou-Ghazale , et al. | 2019-04-23 |
Non-silicon device heterolayers on patterned silicon substrate for CMOS by combination of selective and conformal epitaxy Grant 10,249,490 - Goel , et al. | 2019-04-02 |
Selective Epitaxially Grown Iii-v Materials Based Devices App 20190088747 - GOEL; Niti ;   et al. | 2019-03-21 |
Techniques for forming a compacted array of functional cells Grant 10,217,732 - Elsayed , et al. Feb | 2019-02-26 |
Selective epitaxially grown III-V materials based devices Grant 10,181,518 - Goel , et al. Ja | 2019-01-15 |
Methods and structures to prevent sidewall defects during selective epitaxy Grant 10,096,474 - Mukherjee , et al. October 9, 2 | 2018-10-09 |
Decoupling capacitors and arrangements Grant 10,026,686 - Bou-Ghazale , et al. July 17, 2 | 2018-07-17 |
Self-aligned structures and methods for asymmetric GaN transistors and enhancement mode operation Grant 9,923,087 - Dasgupta , et al. March 20, 2 | 2018-03-20 |
GE and III-V channel semiconductor devices having maximized compliance and free surface relaxation Grant 9,905,651 - Pillarisetty , et al. February 27, 2 | 2018-02-27 |
Conductivity improvements for III-V semiconductor devices Grant 9,899,505 - Radosavljevic , et al. February 20, 2 | 2018-02-20 |
Nanoscale structure with epitaxial film having a recessed bottom portion Grant 9,865,684 - Chu-Kung , et al. January 9, 2 | 2018-01-09 |
Methods And Structures To Prevent Sidewall Defects During Selective Epitaxy App 20170256408 - MUKHERJEE; Niloy ;   et al. | 2017-09-07 |
Integrating Vlsi-compatible Fin Structures With Selective Epitaxial Growth And Fabricating Devices Thereon App 20170250182 - Goel; Niti ;   et al. | 2017-08-31 |
Methods of forming hetero-layers with reduced surface roughness and bulk defect density of non-native surfaces and the structures formed thereby Grant 9,711,591 - Mukherjee , et al. July 18, 2 | 2017-07-18 |
Selective Epitaxially Grown Iii-v Materials Based Devices App 20170194142 - Goel; Niti ;   et al. | 2017-07-06 |
Methods and structures to prevent sidewall defects during selective epitaxy Grant 9,698,013 - Mukherjee , et al. July 4, 2 | 2017-07-04 |
Non-silicon Device Heterolayers On Patterned Silicon Substrate For Cmos By Combination Of Selective And Conformal Epitaxy App 20170186598 - Goel; Niti ;   et al. | 2017-06-29 |
Integrating VLSI-compatible fin structures with selective epitaxial growth and fabricating devices thereon Grant 9,685,381 - Goel , et al. June 20, 2 | 2017-06-20 |
Trench Confined Epitaxially Grown Device Layer(s) App 20170162453 - Pillarisetty; Ravi ;   et al. | 2017-06-08 |
Making A Defect Free Fin Based Device In Lateral Epitaxy Overgrowth Region App 20170154981 - Goel; Niti ;   et al. | 2017-06-01 |
Methods of containing defects for non-silicon device engineering Grant 9,666,583 - Goel , et al. May 30, 2 | 2017-05-30 |
Decoupling Capacitors And Arrangements App 20170148728 - BOU-GHAZALE; Silvio E. ;   et al. | 2017-05-25 |
Methods to enhance doping concentration in near-surface layers of semiconductors and methods of making same Grant 9,653,559 - Mukherjee , et al. May 16, 2 | 2017-05-16 |
Self-aligned Structures And Methods For Asymmetric Gan Transistors & Enhancement Mode Operation App 20170133497 - Dasgupta; Sansaptak ;   et al. | 2017-05-11 |
Ge And Iii-v Channel Semiconductor Devices Having Maximized Compliance And Free Surface Relaxation App 20170125524 - PILLARISETTY; RAVI ;   et al. | 2017-05-04 |
Trench confined epitaxially grown device layer(s) Grant 9,634,007 - Pillarisetty , et al. April 25, 2 | 2017-04-25 |
Techniques For Forming Integrated Passive Devices App 20170077050 - ELSAYED; RANY T. ;   et al. | 2017-03-16 |
Self-aligned structures and methods for asymmetric GaN transistors and enhancement mode operation Grant 9,590,069 - Dasgupta , et al. March 7, 2 | 2017-03-07 |
Making a defect free fin based device in lateral epitaxy overgrowth region Grant 9,583,396 - Goel , et al. February 28, 2 | 2017-02-28 |
Ge and III-V channel semiconductor devices having maximized compliance and free surface relaxation Grant 9,570,614 - Pillarisetty , et al. February 14, 2 | 2017-02-14 |
Techniques To Achieve Area Reduction Through Co-optimizing Logic Core Blocks And Memory Redundancies App 20170023863 - BOU-GHAZALE; SILVIO E. ;   et al. | 2017-01-26 |
Techniques For Forming A Compacted Array Of Functional Cells App 20170018543 - ELSAYED; Rany T. ;   et al. | 2017-01-19 |
Non-silicon Device Heterolayers On Patterned Silicon Substrate For Cmos By Combination Of Selective And Conformal Epitaxy App 20160211263 - GOEL; Niti ;   et al. | 2016-07-21 |
Improved Cladding Layer Epitaxy Via Template Engineering For Heterogeneous Integration On Silicon App 20160204263 - MUKHERJEE; Niloy ;   et al. | 2016-07-14 |
Selective Epitaxially Grown Iii-v Materials Based Devices App 20160204208 - GOEL; Niti ;   et al. | 2016-07-14 |
Integrating Vlsi-compatible Fin Structures With Selective Epitaxial Growth And Fabricating Devices Thereon App 20160204037 - Goel; Niti ;   et al. | 2016-07-14 |
Making A Defect Free Fin Based Device In Lateral Epitaxy Overgrowth Region App 20160204036 - Goel; Niti ;   et al. | 2016-07-14 |
Ge and III-V Channel Semiconductor Devices having Maximized Compliance and Free Surface Relaxation App 20160204246 - PILLARISETTY; RAVI ;   et al. | 2016-07-14 |
Lattice mismatched hetero-epitaxial film Grant 9,391,181 - Chu-Kung , et al. July 12, 2 | 2016-07-12 |
Methods And Structures To Prevent Sidewall Defects During Selective Epitaxy App 20160181099 - MUKHERJEE; Niloy ;   et al. | 2016-06-23 |
Self-aligned Structures And Methods For Asymmetric Gan Transistors & Enhancement Mode Operation App 20150318375 - Dasgupta; Sansaptak ;   et al. | 2015-11-05 |
Methods Of Containing Defects For Non-silicon Device Engineering App 20150270265 - Goel; Niti ;   et al. | 2015-09-24 |
Methods of containing defects for non-silicon device engineering Grant 9,112,028 - Goel , et al. August 18, 2 | 2015-08-18 |
Self-aligned structures and methods for asymmetric GaN transistors and enhancement mode operation Grant 9,099,490 - Dasgupta , et al. August 4, 2 | 2015-08-04 |
Conductivity Improvements For Iii-v Semiconductor Devices App 20150123171 - RADOSAVLJEVIC; MARKO ;   et al. | 2015-05-07 |
Conductivity improvements for III-V semiconductor devices Grant 8,936,976 - Radosavljevic , et al. January 20, 2 | 2015-01-20 |
Defect transferred and lattice mismatched epitaxial film Grant 8,872,225 - Chu-Kung , et al. October 28, 2 | 2014-10-28 |
Trench Confined Epitaxially Grown Device Layer(s) App 20140291726 - Pillarisetty; Ravi ;   et al. | 2014-10-02 |
Methods Of Containing Defects For Non-silicon Device Engineering App 20140231871 - Goel; Niti ;   et al. | 2014-08-21 |
Methods Of Forming Hetero-layers With Reduced Surface Roughness And Bulk Defect Density On Non-native Surfaces And The Structures Formed Thereby App 20140203326 - Mukherjee; Niloy ;   et al. | 2014-07-24 |
Epitaxial film growth on patterned substrate Grant 8,785,907 - Goel , et al. July 22, 2 | 2014-07-22 |
Trench confined epitaxially grown device layer(s) Grant 8,765,563 - Pillarisetty , et al. July 1, 2 | 2014-07-01 |
Epitaxial Film Growth On Patterned Substrate App 20140175378 - Goel; Niti ;   et al. | 2014-06-26 |
Defect Transferred and Lattice Mismatched Epitaxial Film App 20140175512 - CHU-KUNG; BENJAMIN ;   et al. | 2014-06-26 |
Lattice Mismatched Hetero-Epitaxial Film App 20140175509 - CHU-KUNG; BENJAMIN ;   et al. | 2014-06-26 |
Methods of containing defects for non-silicon device engineering Grant 8,716,751 - Goel , et al. May 6, 2 | 2014-05-06 |
Semiconductor device having germanium active layer with underlying parasitic leakage barrier layer Grant 8,710,490 - Pillarisetty , et al. April 29, 2 | 2014-04-29 |
Trench Confined Epitaxially Grown Device Layer(s) App 20140091360 - PILLARISETTY; Ravi ;   et al. | 2014-04-03 |
Methods Of Containing Defects For Non-silicon Device Engineering App 20140091361 - Goel; Niti ;   et al. | 2014-04-03 |
Self-aligned Structures And Methods For Asymmetric Gan Transistors & Enhancement Mode Operation App 20140091308 - DASGUPTA; Sansaptak ;   et al. | 2014-04-03 |
Tunnel field effect transistor and method of manufacturing same Grant 8,686,402 - Goel , et al. April 1, 2 | 2014-04-01 |
Semiconductor Device Having Germanium Active Layer With Underlying Parasitic Leakage Barrier Layer App 20140084246 - Pillarisetty; Ravi ;   et al. | 2014-03-27 |
Methods To Enhance Doping Concentration In Near-surface Layers Of Semiconductors And Methods Of Making Same App 20130320417 - Mukherjee; Niloy ;   et al. | 2013-12-05 |
Tunnel Field Effect Transistor And Method Of Manufacturing Same App 20110315960 - Goel; Niti ;   et al. | 2011-12-29 |
Tunnel field effect transistor and method of manufacturing same Grant 8,026,509 - Goel , et al. September 27, 2 | 2011-09-27 |
Conductivity Improvements For Iii-v Semiconductor Devices App 20110147798 - Radosavljevic; Marko ;   et al. | 2011-06-23 |
Tunnel field effect transistor and method of manufacturing same App 20100163845 - Goel; Niti ;   et al. | 2010-07-01 |