loadpatents
name:-0.005591869354248
name:-0.010528087615967
name:-0.0020267963409424
GLOBALFOUNDRIES Patent Filings

GLOBALFOUNDRIES

Patent Applications and Registrations

Patent applications and USPTO patent grants for GLOBALFOUNDRIES.The latest application filed is for "high productivity combinatorial techniques for titanium nitride etching".

Company Profile
1.10.7
  • GLOBALFOUNDRIES - Grand Cayman KY
  • GLOBALFOUNDRIES; - US
  • GlobalFoundries - Singapore SG
  • Globalfoundries - Sunnyvale CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Vertical transport field effect transistors
Grant 10,170,617 - Kim , et al. J
2019-01-01
In-situ contactless monitoring of photomask pellicle degradation
Grant 10,161,915 - Riviere , et al. Dec
2018-12-25
Searching for secret data through an untrusted searcher
Grant 9,817,899 - Geagan, III , et al. November 14, 2
2017-11-14
FinFET device
Grant 9,406,570 - Cheng , et al. August 2, 2
2016-08-02
Forming fins of different materials on the same substrate
Grant 9,368,492 - Cheng , et al. June 14, 2
2016-06-14
On-chip test for integrated AC coupling capacitors
Grant 9,335,370 - Atwood , et al. May 10, 2
2016-05-10
Contact and solder ball interconnect
Grant 9,177,928 - Arvin , et al. November 3, 2
2015-11-03
High Productivity Combinatorial Techniques for Titanium Nitride Etching
App 20140179112 - Foster; John ;   et al.
2014-06-26
Semiconductor Device Including Graded Gate Stack, Related Method And Design Structure
App 20140070334 - Chudzik; Michael P. ;   et al.
2014-03-13
Middle In-situ Doped Sige Junctions For Pmos Devices On 28 Nm Low Power/high Performance Technologies Using A Silicon Oxide Encapsulation, Early Halo And Extension Implantations
App 20130320450 - Hoentschel; Jan ;   et al.
2013-12-05
PROCESS TO REMOVE Ni AND Pt RESIDUES FOR NiPtSi APPLICATIONS
App 20130122671 - Duong; Anh ;   et al.
2013-05-16
Methods of integrating reverse eSiGe on NFET and SiGe channel on PFET, and related structure
Grant 8,232,186 - Harley , et al. July 31, 2
2012-07-31
Method To Form Nanopore Array
App 20120040512 - Li; Zhengwen ;   et al.
2012-02-16
FinFET device with multiple fin structures
Grant 7,679,134 - Buynoski , et al. March 16, 2
2010-03-16
System and method for improving oxide-nitride-oxide (ONO) coupling in a semiconductor device
Grant 7,679,129 - Hui , et al. March 16, 2
2010-03-16

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