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name:-0.0077831745147705
name:-0.00076699256896973
Gist; William B. Patent Filings

Gist; William B.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Gist; William B..The latest application filed is for "method and apparatus for generating an input switching reference".

Company Profile
0.12.5
  • Gist; William B. - Chelmsford MA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method and apparatus for generating an input switching reference
Grant 6,922,086 - Gist July 26, 2
2005-07-26
Bidirectional input/output cells
Grant 6,870,399 - Ngo , et al. March 22, 2
2005-03-22
Method and apparatus for generating an input switching reference
App 20040124906 - Gist, William B.
2004-07-01
Bidirectional input/output cells
App 20040119519 - Ngo, Hiep P. ;   et al.
2004-06-24
On-chip power supply noise reduction
Grant 6,664,848 - Gist December 16, 2
2003-12-16
Automated approach for measuring signaling setup, hold and jitter
App 20030130830 - Gist, William B. ;   et al.
2003-07-10
Single-ended IO with dynamic synchronous deskewing architecture
App 20030081709 - Ngo, Hiep P. ;   et al.
2003-05-01
Synchronous receiver
App 20030053578 - Hinck, Todd A. ;   et al.
2003-03-20
Integrated circuit output power supply transient voltage protection circuit
Grant 5,910,725 - Gist June 8, 1
1999-06-08
Semiconductor process, power supply and temperature compensated system bus integrated interface architecture with precision receiver
Grant 5,687,330 - Gist , et al. November 11, 1
1997-11-11
Semiconductor process power supply voltage and temperature compensated integrated system bus driver rise and fall time
Grant 5,657,456 - Gist , et al. August 12, 1
1997-08-12
Reduced system bus receiver setup time by latching unamplified bus voltage
Grant 5,654,653 - Coyle , et al. August 5, 1
1997-08-05
Semiconductor process, power supply voltage and temperature compensated integrated system bus termination
Grant 5,634,014 - Gist , et al. May 27, 1
1997-05-27
Externally programmable integrated bus terminator for optimizing system bus performance
Grant 5,479,123 - Gist , et al. December 26, 1
1995-12-26
Bus settle time by using previous bus state to condition bus at all receiving locations
Grant 5,461,330 - Gist , et al. October 24, 1
1995-10-24
Propagation speedup by use of complementary resolver outputs in a system bus receiver
Grant 5,406,147 - Coyle , et al. April 11, 1
1995-04-11
Compensated offset voltage, low gain, high bandwidth, full swing, wide common mode range, CMOS differential voltage amplifier
Grant 5,361,042 - Gist November 1, 1
1994-11-01

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