| Patent | Date |
|---|
Methods, systems, and computer program product for implementing legal routing tracks across virtual hierarchies and legal placement patterns
Grant 10,776,555 - Ginetti Sept | 2020-09-15 |
System, method, and computer program product for displaying bump layout for manufacturing variations
Grant 10,685,167 - Lepere , et al. | 2020-06-16 |
Electronic circuit design editor with overlay of layout and schematic design features
Grant 10,565,342 - Ginetti , et al. Feb | 2020-02-18 |
Systems and methods for dynamically generating hierarchical rotating pcells from a static integrated circuit design
Grant 10,496,772 - Ginetti , et al. De | 2019-12-03 |
Technology database independent components for integrated circuit package
Grant 10,423,750 - Ginetti , et al. Sept | 2019-09-24 |
Methods and systems for schematic driven 2D chaining in an integrated circuit layout
Grant 10,394,995 - Mallon , et al. A | 2019-08-27 |
Methods, systems, and computer program product for implementing an electronic design by manipulating a hierarchical structure of the electronic design
Grant 10,354,037 - Ginetti July 16, 2 | 2019-07-16 |
Method and system for performing incremental post layout simulation with layout edits
Grant 10,346,573 - Sharma , et al. July 9, 2 | 2019-07-09 |
Methods, systems, and computer program product for implementing virtual prototyping for electronic designs
Grant 10,331,841 - Ginetti , et al. | 2019-06-25 |
Methods, systems, and computer program product for implementing legal routing tracks across virtual hierarchies and legal placement patterns
Grant 10,282,505 - Ginetti | 2019-05-07 |
Method and apparatus to drive layout of arbitrary EM-coil through parametrized cell
Grant 10,285,276 - Kukal , et al. | 2019-05-07 |
Methods, systems, and computer program product for dynamically abstracting virtual hierarchies for an electronic design
Grant 10,210,299 - Ginetti Feb | 2019-02-19 |
Methods, systems, and computer program product for implementing dynamic maneuvers within virtual hierarchies of an electronic design
Grant 10,192,020 - Ginetti Ja | 2019-01-29 |
Methods, systems, and computer program product for implementing three-dimensional integrated circuit designs
Grant 10,133,841 - Majumder , et al. November 20, 2 | 2018-11-20 |
Methods, systems, and computer program product for implementing synchronous clones for an electronic design
Grant 10,073,942 - Ginetti September 11, 2 | 2018-09-11 |
Methods, systems, and computer program product for implementing engineering change orders with figure groups and virtual hierarchies
Grant 10,055,528 - Ginetti August 21, 2 | 2018-08-21 |
Methods, systems, and computer program product for implementing a floorplan with virtual hierarchies and figure groups for an electronic design
Grant 10,055,529 - Ginetti August 21, 2 | 2018-08-21 |
Methods, systems, and computer program product for implementing a layout-driven, multi-fabric schematic design
Grant 9,934,354 - Kukal , et al. April 3, 2 | 2018-04-03 |
Methods, systems, and computer program product for constructing a simulation schematic of an electronic design across multiple design fabrics
Grant 9,881,119 - Kukal , et al. January 30, 2 | 2018-01-30 |
Method, system, and computer program product for implementing a multi-fabric mixed-signal design spanning across multiple design fabrics with electrical and thermal analysis awareness
Grant 9,881,120 - Ginetti , et al. January 30, 2 | 2018-01-30 |
Methods and systems for enabling concurrent editing of electronic circuit layouts
Grant 9,842,183 - Ginetti , et al. December 12, 2 | 2017-12-12 |
Methods and systems for generation and editing of parameterized figure group
Grant 9,830,417 - Ginetti , et al. November 28, 2 | 2017-11-28 |
Methods, systems, and computer program product for implementing a simulation platform with dynamic device model libraries for electronic designs
Grant 9,798,840 - Ginetti October 24, 2 | 2017-10-24 |
Methods, systems, and computer program product for implementing electronic design layouts with symbolic representations
Grant 9,779,193 - Ginetti , et al. October 3, 2 | 2017-10-03 |
System and method for accelerated graphic rendering of design layout having variously sized geometric objects
Grant 9,761,204 - Ginetti , et al. September 12, 2 | 2017-09-12 |
Method, system, and computer program product for implementing a multi-fabric electronic design spanning across multiple design fabrics
Grant 9,361,415 - Ginetti , et al. June 7, 2 | 2016-06-07 |
Method, system, and computer program product for probing or netlisting a multi-fabric electronic design spanning across multiple design fabrics
Grant 9,348,960 - Ginetti , et al. May 24, 2 | 2016-05-24 |
Methods, systems, and articles of manufacture for analyzing a multi-fabric electronic design and displaying analysis results for the multi-fabric electronic design spanning and displaying simulation results across multiple design fabrics
Grant 9,280,621 - Ginetti , et al. March 8, 2 | 2016-03-08 |
Method, system, and computer program product for checking, verifying, or testing a multi-fabric electronic design spanning across multiple design fabrics
Grant 9,223,915 - Ginetti , et al. December 29, 2 | 2015-12-29 |
Method to preview an undo/redo list
Grant 9,208,137 - Ginetti December 8, 2 | 2015-12-08 |
System and method to drag instance master physical shell
Grant 9,141,746 - Ginetti , et al. September 22, 2 | 2015-09-22 |
Synchronized three-dimensional display of connected documents
Grant 9,129,081 - Ginetti , et al. September 8, 2 | 2015-09-08 |
System and method for automatically reconfiguring chain of abutted devices in electronic circuit design
Grant 8,910,100 - Wilson , et al. December 9, 2 | 2014-12-09 |
Producing a net topology pattern as a constraint upon routing of signal paths in an integrated circuit design
Grant 8,806,405 - Colwell , et al. August 12, 2 | 2014-08-12 |
Method, system, and computer program product for implementing multi-power domain digital / mixed signal verification and low power simulation
Grant 8,762,906 - Ginetti , et al. June 24, 2 | 2014-06-24 |
Method, system, and computer program product for implementing multi-power domain digital / mixed-signal verification and low power simulation
Grant 8,732,636 - Ginetti , et al. May 20, 2 | 2014-05-20 |
System and method to generate re-useable layout components from schematic components in an IC design with hierarchical parameters
Grant 8,719,754 - Ginetti May 6, 2 | 2014-05-06 |
Producing A Net Topolgy Pattern As A Constraint Upon Routing Of Signal Paths In An Integrated Circuit Design
App 20140123094 - Colwell; Regis ; et al. | 2014-05-01 |
Method and apparatus for circuit simulation using parallel computing
Grant 8,594,988 - Spyrou , et al. November 26, 2 | 2013-11-26 |
Synchronized Three-dimensional Display Of Connected Documents
App 20130290834 - GINETTI; Arnold ; et al. | 2013-10-31 |
Synchronized Three-dimensional Display Of Connected Documents
App 20130246900 - GINETTI; Arnold ; et al. | 2013-09-19 |
Method and system for implementing graphically editable parameterized cells
Grant 8,527,934 - Ginetti , et al. September 3, 2 | 2013-09-03 |
Change tracking and incremental synchronization of EDA design and technology data
Grant 8,453,136 - Hahn , et al. May 28, 2 | 2013-05-28 |
Method And System For Implementing Graphically Editable Parameterized Cells
App 20130097572 - Ginetti; Arnold ; et al. | 2013-04-18 |
Method and system for implementing multiuser cached parameterized cells
Grant 8,364,656 - Arora , et al. January 29, 2 | 2013-01-29 |
Method and system for implementing graphically editable parameterized cells
Grant 8,347,261 - Ginetti , et al. January 1, 2 | 2013-01-01 |
System and method to generate re-useable layout components from schematic components in an IC design with hierarchical parameters
Grant 8,281,272 - Ginetti October 2, 2 | 2012-10-02 |
System and method for generating flat layout
Grant 8,255,845 - Ginetti August 28, 2 | 2012-08-28 |
Method To Preview An Undo/redo List
App 20120047434 - Ginetti; Arnold | 2012-02-23 |
Systems and methods of editing cells of an electronic circuit design
Grant 8,046,730 - Ferguson , et al. October 25, 2 | 2011-10-25 |
Method, System, And Computer Program Product For Implementing Multi-power Domain Digital / Mixed Signal Verification And Low Power Simulation
App 20110161900 - Ginetti; Arnold ; et al. | 2011-06-30 |
Method, System, And Computer Program Product For Implementing Multi-power Domain Digital / Mixed-signal Verification And Low Power Simulation
App 20110161899 - GINETTI; Arnold ; et al. | 2011-06-30 |
Method and system for implementing cached parameterized cells
Grant 7,971,175 - Ginetti , et al. June 28, 2 | 2011-06-28 |
System to merge custom and synthesized digital integrated circuit design data
Grant 7,971,178 - Marwah , et al. June 28, 2 | 2011-06-28 |
Method and system for implementing abstract layout structures with parameterized cells
Grant 7,949,987 - Ginetti , et al. May 24, 2 | 2011-05-24 |
Method And System For Implementing Graphically Editable Parameterized Cells
App 20110061034 - GINETTI; Arnold ; et al. | 2011-03-10 |
System And Method For Generating Flat Layout
App 20100306729 - GINETTI; ARNOLD | 2010-12-02 |
Method And System For Implementing Multiuser Cached Parameterized Cells
App 20100115207 - ARORA; Rajan ; et al. | 2010-05-06 |
Method for updating a placed and routed netlist
Grant 7,634,743 - Ginetti December 15, 2 | 2009-12-15 |
Method and apparatus for maintaining synchronization between layout clones
Grant 7,555,739 - Ginetti , et al. June 30, 2 | 2009-06-30 |
Method And System For Implementing Cached Parameterized Cells
App 20090007031 - Ginetti; Arnold ; et al. | 2009-01-01 |
Method and apparatus for physical budgeting during RTL floorplanning
Grant 6,622,291 - Ginetti September 16, 2 | 2003-09-16 |
Timing verification method employing dynamic abstraction in core/shell partitioning
Grant 6,622,290 - Ginetti , et al. September 16, 2 | 2003-09-16 |
Method and system for timing and area driven binary and/or matching
Grant 6,519,743 - Nauts , et al. February 11, 2 | 2003-02-11 |
Updating placement during technology mapping
Grant 6,405,345 - Ginetti June 11, 2 | 2002-06-11 |
Using budgeted required time during technology mapping
Grant 6,378,116 - Ginetti April 23, 2 | 2002-04-23 |
Method and system for floorplanning a circuit design at a high level of abstraction
Grant 6,170,080 - Ginetti , et al. January 2, 2 | 2001-01-02 |
Computer aided design system and method using hierarchical and flat netlist circuit representations
Grant 6,113,647 - Silve , et al. September 5, 2 | 2000-09-05 |
Logic synthesis constraints allocation automating the concurrent engineering flows
Grant 6,086,621 - Ginetti , et al. July 11, 2 | 2000-07-11 |
Automated optimization of hierarchical netlists
Grant 5,956,257 - Ginetti , et al. September 21, 1 | 1999-09-21 |
Method and a system for fixing hold time violations in hierarchical designs
Grant 5,896,299 - Ginetti , et al. April 20, 1 | 1999-04-20 |
Apparatus and method for synthesizing integrated circuits using parameterized HDL modules
Grant 5,841,663 - Sharma , et al. November 24, 1 | 1998-11-24 |
Method and a system for specifying and automatically analyzing multiple clock timing constraints in a VLSI circuit
Grant 5,825,658 - Ginetti , et al. October 20, 1 | 1998-10-20 |
Method for improving the operation of a circuit through iterative substitutions and performance analyses of datapath cells
Grant 5,764,525 - Mahmood , et al. June 9, 1 | 1998-06-09 |
Automated system and method for identifying critical timing paths in integrated circuit layouts for use with automated circuit layout system
Grant 5,751,596 - Ginetti , et al. May 12, 1 | 1998-05-12 |
Method and apparatus for characterizing timing behavior of datapaths for integrated circuit design and fabrication
Grant 5,726,902 - Mahmood , et al. March 10, 1 | 1998-03-10 |
Method for eliminating a false critical path in a logic circuit
Grant 5,638,290 - Ginetti , et al. June 10, 1 | 1997-06-10 |
Apparatus and method for improving the timing performance of a circuit
Grant 5,426,591 - Ginetti , et al. June 20, 1 | 1995-06-20 |
Automated circuit design system and method for reducing critical path delay times
Grant 5,396,435 - Ginetti March 7, 1 | 1995-03-07 |
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