Gilmer; Mark C.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Gilmer; Mark C..The latest application filed is for "method of making enhanced trench oxide with low temperature nitrogen integration".

Company Profile

0.47.0

Gilmer; Mark C. - Austin TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method of making enhanced trench oxide with low temperature nitrogen integration Grant 6,727,569 - Gardner , et al. April 27, 2	2004-04-27
Nitrogenated gate structure for improved transistor performance and method for making same Grant 6,373,113 - Gardner , et al. April 16, 2	2002-04-16
Metal silicide transistor gate spaced from a semiconductor substrate by a ceramic gate dielectric having a high dielectric constant Grant 6,265,749 - Gardner , et al. July 24, 2	2001-07-24
Method of making elevated source/drain using poly underlayer Grant 6,211,025 - Gardner , et al. April 3, 2	2001-04-03
Ferroelectric-enhanced tantalum pentoxide for dielectric material applications in CMOS devices Grant 6,197,668 - Gardner , et al. March 6, 2	2001-03-06
Method of making high performance MOSFET with polished gate and source/drain feature Grant 6,174,794 - Gardner , et al. January 16, 2	2001-01-16
Semiconductor devices comprised of one or more epitaxial layers Grant 6,169,306 - Gardner , et al. January 2, 2	2001-01-02
Apparatus for performing jet vapor reduction of the thickness of process layers Grant 6,165,314 - Gardner , et al. December 26, 2	2000-12-26
Semiconductor device with a composite gate dielectric layer and gate barrier layer and method of making same Grant 6,163,060 - Gardner , et al. December 19, 2	2000-12-19
Method and system for heating semiconductor wafers Grant 6,152,075 - Gardner , et al. November 28, 2	2000-11-28
Ultra short transistor channel length formed using a gate dielectric having a relatively high dielectric constant Grant 6,153,477 - Gardner , et al. November 28, 2	2000-11-28
Method and apparatus for in-situ cleaning of polysilicon-coated quartz furnaces Grant 6,148,832 - Gilmer , et al. November 21, 2	2000-11-21
Method of making high performance MOSFET with integrated simultaneous formation of source/drain and gate regions Grant 6,140,191 - Gardner , et al. October 31, 2	2000-10-31
Incorporating barrier atoms into a gate dielectric using gas cluster ion beam implantation Grant 6,124,620 - Gardner , et al. September 26, 2	2000-09-26
Method of making a semiconductor device with a multi-level gate structure Grant 6,121,094 - Gardner , et al. September 19, 2	2000-09-19
Method of making a semiconductor device with a composite gate dielectric layer and gate barrier layer Grant 6,114,228 - Gardner , et al. September 5, 2	2000-09-05
Method of integration of nitrogen bearing high K film Grant 6,110,784 - Gardner , et al. August 29, 2	2000-08-29
Semiconductor fabrication employing self-aligned sidewall spacers laterally adjacent to a transistor gate Grant 6,111,292 - Gardner , et al. August 29, 2	2000-08-29
Method of making ultra thin gate oxide using aluminum oxide Grant 6,100,204 - Gardner , et al. August 8, 2	2000-08-08
Manufacturing process for reducing feature dimensions in a semiconductor Grant 6,096,659 - Gardner , et al. August 1, 2	2000-08-01
Semiconductor wafer, handling apparatus, and method Grant 6,086,976 - Gardner , et al. July 11, 2	2000-07-11
Transistor having an etchant-scalable channel length and method of making same Grant 6,072,213 - Gardner , et al. June 6, 2	2000-06-06
Semiconductor device having a nitrogen bearing isolation region Grant 6,057,209 - Gardner , et al. May 2, 2	2000-05-02
Semiconductor device having a tri-layer gate insulating dielectric Grant 6,057,584 - Gardner , et al. May 2, 2	2000-05-02
Semiconductor device fabrication using a sacrificial plug for defining a region for a gate electrode Grant 6,051,487 - Gardner , et al. April 18, 2	2000-04-18
Transistor having a barrier layer below a high permittivity gate dielectric Grant 6,051,865 - Gardner , et al. April 18, 2	2000-04-18
Flash memory device having high permittivity stacked dielectric and fabrication thereof Grant 6,048,766 - Gardner , et al. April 11, 2	2000-04-11
Semiconductor device having dual gate electrode material and process of fabrication thereof Grant 6,043,157 - Gardner , et al. March 28, 2	2000-03-28
Oxide formation technique using thin film silicon deposition Grant 6,040,207 - Gardner , et al. March 21, 2	2000-03-21
Semiconductor device with a multi-level gate structure and a gate dielectric composed of barium zirconium titanate material Grant 6,005,274 - Gardner , et al. December 21, 1	1999-12-21
Compound material T gate structure for devices with gate dielectrics having a high dielectric constant Grant 6,002,150 - Gardner , et al. December 14, 1	1999-12-14
Transistor with ultra short length defined partially by sidewall oxidation of a gate conductor overlying the channel length Grant 5,989,967 - Gardner , et al. November 23, 1	1999-11-23
Diamond etch stop rendered conductive by a gas cluster ion beam implant of titanium Grant 5,990,493 - Gardner , et al. November 23, 1	1999-11-23
Polishing method for thin gates dielectric in semiconductor process Grant 5,985,706 - Gilmer , et al. November 16, 1	1999-11-16
Implanted isolation structure formation for high density CMOS integrated circuits Grant 5,976,952 - Gardner , et al. November 2, 1	1999-11-02
Semiconductor device having nitrogen enhanced high permittivity gate insulating layer and fabrication thereof Grant 5,963,810 - Gardner , et al. October 5, 1	1999-10-05
Semiconductor trench isolation structure formed substantially within a single chamber Grant 5,937,308 - Gardner , et al. August 10, 1	1999-08-10
Incorporating silicon atoms into a metal oxide gate dielectric using gas cluster ion beam implantation Grant 5,907,780 - Gilmer , et al. May 25, 1	1999-05-25
Semiconductor wafer, handling apparatus, and method Grant 5,890,269 - Gardner , et al. April 6, 1	1999-04-06
Oxide formation technique using thin film silicon deposition Grant 5,872,376 - Gardner , et al. February 16, 1	1999-02-16
Semiconductor fabrication employing self-aligned sidewall spacers laterally adjacent to a transistor gate Grant 5,858,848 - Gardner , et al. January 12, 1	1999-01-12
Method of manufacturing an isolation region of a semiconductor device with advanced planarization Grant 5,851,901 - Gardner , et al. December 22, 1	1998-12-22
Method for in-situ cleaning of polysilicon-coated quartz furnaces Grant 5,851,307 - Gilmer , et al. December 22, 1	1998-12-22
Controlled oxide growth and highly selective etchback technique for forming ultra-thin oxide Grant 5,851,888 - Gardner , et al. December 22, 1	1998-12-22
Gate oxidation technique for deep sub quarter micron transistors Grant 5,849,643 - Gilmer , et al. December 15, 1	1998-12-15
Enhanced oxynitride gate dielectrics using NF.sub.3 gas Grant 5,840,610 - Gilmer , et al. November 24, 1	1998-11-24
Oxynitride GTE dielectrics using NH.sub.3 gas Grant 5,821,172 - Gilmer , et al. October 13, 1	1998-10-13

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