Gillingham; Peter B.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Gillingham; Peter B..The latest application filed is for "clock mode determination in a memory system".

Company Profile

6.87.61

Gillingham; Peter B. - Ottawa CA
Gillingham; Peter B. - Kanata N/A CA
Gillingham; Peter B - Kanata N/A CA
GILLINGHAM; Peter B. - Ottawa formerly Kanata

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Clock mode determination in a memory system Grant 11,347,396 - Gillingham , et al. May 31, 2	2022-05-31
Non-volatile semiconductor memory having multiple external power supplies Grant 11,049,574 - Kim , et al. June 29, 2	2021-06-29
Clock Mode Determination In A Memory System App 20210132799 - Gillingham; Peter B. ; et al.	2021-05-06
Clock mode determination in a memory system Grant 10,866,739 - Gillingham , et al. December 15, 2	2020-12-15
Non-volatile Semiconductor Memory Having Multiple External Power Supplies App 20200357477 - KIM; Jin-Ki ; et al.	2020-11-12
Non-volatile semiconductor memory having multiple external power supplies Grant 10,706,943 - Kim , et al.	2020-07-07
Clock Mode Determination In A Memory System App 20200110535 - GILLINGHAM; Peter B. ; et al.	2020-04-09
Clock mode determination in a memory system Grant 10,489,057 - Gillingham , et al. Nov	2019-11-26
Non-volatile Semiconductor Memory Having Multiple External Power Supplies App 20190189225 - KIM; Jin-Ki ; et al.	2019-06-20
Clock Mode Determination In A Memory System App 20190163365 - GILLINGHAM; Peter B. ; et al.	2019-05-30
Non-volatile semiconductor memory having multiple external power supplies Grant 10,199,113 - Kim , et al. Fe	2019-02-05
Clock mode determination in a memory system Grant 10,140,028 - Gillingham , et al. Nov	2018-11-27
Clock Mode Determination In A Memory System App 20180314424 - GILLINGHAM; Peter B. ; et al.	2018-11-01
Bridging device having a configurable virtual page size Grant 9,977,731 - Pyeon , et al. May 22, 2	2018-05-22
Clock mode determination in a memory system Grant 9,971,518 - Gillingham , et al. May 15, 2	2018-05-15
Non-volatile semiconductor memory having multiple external power supplies Grant 9,928,918 - Kim , et al. March 27, 2	2018-03-27
Clock Mode Determination In A Memory System App 20170322730 - GILLINGHAM; Peter B. ; et al.	2017-11-09
Non-volatile Semiconductor Memory Having Multiple External Power Supplies App 20170309342 - KIM; Jin-Ki ; et al.	2017-10-26
Using interrupted through-silicon-vias in integrated circuits adapted for stacking Grant 9,780,073 - Gillingham October 3, 2	2017-10-03
Clock mode determination in a memory system Grant 9,740,407 - Gillingham , et al. August 22, 2	2017-08-22
Clock Mode Determination In A Memory System App 20170160935 - GILLINGHAM; Peter B. ; et al.	2017-06-08
Non-volatile Semiconductor Memory Having Multiple External Power Supplies App 20170117052 - KIM; Jin-Ki ; et al.	2017-04-27
Non-volatile semiconductor memory having multiple external power supplies Grant 9,576,675 - Kim , et al. February 21, 2	2017-02-21
Clock mode determination in a memory system Grant 9,552,889 - Gillingham , et al. January 24, 2	2017-01-24
Clock Mode Determination In A Memory System App 20160293265 - GILLINGHAM; Peter B. ; et al.	2016-10-06
Clock mode determination in a memory system Grant 9,384,847 - Gillingham , et al. July 5, 2	2016-07-05
Semiconductor memory device with plural memory die and controller die Grant 9,348,786 - Gillingham May 24, 2	2016-05-24
Using Interrupted Through-silicon-vias In Integrated Circuits Adapted For Stacking App 20160099234 - GILLINGHAM; Peter B.	2016-04-07
Non-volatile Semiconductor Memory Having Multiple External Power Supplies App 20160099072 - KIM; Jin-Ki ; et al.	2016-04-07
Clock Mode Determination In A Memory System App 20150255167 - GILLINGHAM; Peter B. ; et al.	2015-09-10
Semiconductor Memory Device With Plural Memory Die And Controller Die App 20150161072 - Gillingham; Peter B.	2015-06-11
Clock mode determination in a memory system Grant 9,042,199 - Gillingham , et al. May 26, 2	2015-05-26
High Bandwidth Memory Interface App 20150078057 - GILLINGHAM; Peter B. ; et al.	2015-03-19
Error Detection Method And A System Including One Or More Memory Device App 20150019936 - GILLINGHAM; Peter B.	2015-01-15
Clock Mode Determination In A Memory System App 20150009761 - GILLINGHAM; Peter B. ; et al.	2015-01-08
Simultaneous read and write data transfer Grant 8,898,415 - Gillingham November 25, 2	2014-11-25
Error detection method and a system including one or more memory devices Grant 8,880,970 - Gillingham November 4, 2	2014-11-04
Clock mode determination in a memory system Grant 8,854,915 - Gillingham , et al. October 7, 2	2014-10-07
Asynchronous Bridge Chip App 20140293705 - GILLINGHAM; Peter B.	2014-10-02
Phase-change memory with multiple polarity bits having enhanced endurance and error tolerance Grant 8,780,622 - Kim , et al. July 15, 2	2014-07-15
Clock Mode Determination In A Memory System App 20140133243 - GILLINGHAM; Peter B. ; et al.	2014-05-15
Delay Locked Loop Implementation In A Synchronous Dynamic Random Access Memory App 20140104969 - Foss; Richard C. ; et al.	2014-04-17
High bandwidth memory interface Grant 8,654,573 - Gillingham , et al. February 18, 2	2014-02-18
Clock mode determination in a memory system Grant 8,644,108 - Gillingham , et al. February 4, 2	2014-02-04
Delay locked loop implementation in a synchronous dynamic random access memory Grant 8,638,638 - Foss , et al. January 28, 2	2014-01-28
Bridging Device Having A Configurable Virtual Page Size App 20140019705 - PYEON; Hong Beom ; et al.	2014-01-16
Simultaneous Read And Write Data Transfer App 20140013041 - GILLINGHAM; Peter B.	2014-01-09
Method and apparatus for sharing internal power supplies in integrated circuit devices Grant 8,625,352 - Gillingham January 7, 2	2014-01-07
High Bandwidth Memory Interface App 20130329482 - GILLINGHAM; Peter B. ; et al.	2013-12-12
Bridging Device Having A Frequency Configurable Clock Domain App 20130318287 - PYEON; Hong Beom ; et al.	2013-11-28
Single chip frame buffer and graphics accelerator Grant RE44,589 - Fielder , et al. November 12, 2	2013-11-12
Bridging device having a configurable virtual page size Grant 8,549,209 - Pyeon , et al. October 1, 2	2013-10-01
Termination Circuit For On-die Termination App 20130249592 - GILLINGHAM; Peter B.	2013-09-26
Clock Mode Determination In A Memory System App 20130235659 - GILLINGHAM; Peter B. ; et al.	2013-09-12
Simultaneous read and write data transfer Grant 8,521,980 - Gillingham August 27, 2	2013-08-27
Phase-change Memory With Multiple Polarity Bits Having Enhanced Endurance And Error Tolerance App 20130215677 - Kim; Jin-Ki ; et al.	2013-08-22
Bridging device having a frequency configurable clock domain Grant 8,504,789 - Pyeon , et al. August 6, 2	2013-08-06
Multi-chip package with offset die stacking Grant 8,502,368 - Gillingham August 6, 2	2013-08-06
Memory Module Including A Plurality Of Synchronous Memory Devices App 20130132761 - GILLINGHAM; Peter B. ; et al.	2013-05-23
Delay Locked Loop Implementation In A Synchronous Dynamic Random Access Memory App 20130121096 - Foss; Richard C. ; et al.	2013-05-16
Clock mode determination in a memory system Grant 8,432,767 - Gillingham , et al. April 30, 2	2013-04-30
Phase-change memory with multiple polarity bits having enhanced endurance and error tolerance Grant 8,432,729 - Kim , et al. April 30, 2	2013-04-30
Using interrupted through-silicon-vias in integrated circuits adapted for stacking Grant 8,400,781 - Gillingham March 19, 2	2013-03-19
Method And Apparatus For Sharing Internal Power Supplies In Integrated Circuit Devices App 20120127798 - GILLINGHAM; Peter B.	2012-05-24
Phase-change Memory With Multiple Polarity Bits Having Enhanced Endurance And Error Tolerance App 20120087182 - Kim; Jin-Ki ; et al.	2012-04-12
Multi-chip Package With Offset Die Stacking App 20120056335 - GILLINGHAM; Peter B.	2012-03-08
Dense Mode Coding Scheme App 20110317704 - Brown; David A. ; et al.	2011-12-29
Dense mode coding scheme Grant 8,023,519 - Brown , et al. September 20, 2	2011-09-20
Clock Mode Determination In A Memory System App 20110110165 - GILLINGHAM; Peter B. ; et al.	2011-05-12
Using Interrupted Through-silicon-vias In Integrated Circuits Adapted For Stacking App 20110050320 - Gillingham; Peter B.	2011-03-03
Clock mode determination in a memory system Grant 7,885,140 - Gillingham , et al. February 8, 2	2011-02-08
Simultaneous Read And Write Data Transfer App 20110016279 - Gillingham; Peter B.	2011-01-20
Bridging Device Having A Frequency Configurable Clock Domain App 20100327923 - PYEON; Hong Beom ; et al.	2010-12-30
Single chip frame buffer and graphics accelerator Grant RE41,565 - Fielder , et al. August 24, 2	2010-08-24
Bridge Device Having A Virtual Page Buffer App 20100115172 - GILLINGHAM; Peter B. ; et al.	2010-05-06
Dense Mode Coding Scheme App 20100049870 - Brown; David A. ; et al.	2010-02-25
Delay Locked Loop Implementation in a Synchronous Dynamic Random Access Memory App 20090316514 - Foss; Richard C. ; et al.	2009-12-24
Dense mode coding scheme Grant 7,633,960 - Brown , et al. December 15, 2	2009-12-15
Delay locked loop implementation in a synchronous dynamic random access memory Grant 7,599,246 - Foss , et al. October 6, 2	2009-10-06
Clock Mode Determination In A Memory System App 20090039927 - GILLINGHAM; Peter B. ; et al.	2009-02-12
Dynamic random access memory using imperfect isolating transistors Grant RE40,552 - Foss , et al. October 28, 2	2008-10-28
Single chip frame buffer and graphics accelerator Grant RE40,326 - Fielder , et al. May 20, 2	2008-05-20
Dense Mode Coding Scheme App 20080101372 - BROWN; David A. ; et al.	2008-05-01
Dense mode coding scheme Grant 7,346,009 - Brown , et al. March 18, 2	2008-03-18
Method of multi-level storage in DRAM and apparatus thereof Grant RE40,075 - Gillingham February 19, 2	2008-02-19
DRAM boosted voltage supply App 20070200611 - Foss; Richard C. ; et al.	2007-08-30
DRAM boosted voltage supply App 20060028899 - Foss; Richard C. ; et al.	2006-02-09
Delay locked loop implementation in a synchronous dynamic random access memory Grant 6,992,950 - Foss , et al. January 31, 2	2006-01-31
DRAM boosted voltage supply Grant 6,980,448 - Foss , et al. December 27, 2	2005-12-27
Delay locked loop implementation in a synchronous dynamic random access memory App 20050265506 - Foss, Richard C. ; et al.	2005-12-01
Delayed locked loop implementation in a synchronous dynamic random access memory App 20040130962 - Foss, Richard C. ; et al.	2004-07-08
Searchline control circuit and power reduction method Grant 6,744,688 - Gillingham , et al. June 1, 2	2004-06-01
Dense mode coding scheme App 20040062208 - Brown, David A. ; et al.	2004-04-01
Boosted voltage supply App 20040036456 - Foss, Richard C. ; et al.	2004-02-26
Delayed locked loop implementation in a synchronous dynamic random access memory Grant 6,657,918 - Foss , et al. December 2, 2	2003-12-02
Delayed locked loop implementation in a synchronous dynamic random access memory Grant 6,657,919 - Foss , et al. December 2, 2	2003-12-02
Dynamic random access memory boosted voltage supply Grant 6,614,705 - Foss , et al. September 2, 2	2003-09-02
Searchline control circuit and power reduction method App 20030161209 - Gillingham, Peter B. ; et al.	2003-08-28
Memory system having synchronous-link DRAM (SLDRAM) devices and controller App 20030126356 - Gustavson, David B. ; et al.	2003-07-03
Low power content addressable memory architecture Grant 6,584,003 - Kim , et al. June 24, 2	2003-06-24
Delayed locked loop implementation in a synchronous dynamic random access memory App 20030107944 - Foss, Richard C. ; et al.	2003-06-12
Delayed locked loop implementation in a synchronous dynamic random access memory App 20030090952 - Foss, Richard C. ; et al.	2003-05-15
Searchline control circuit and power reduction method Grant 6,522,596 - Gillingham , et al. February 18, 2	2003-02-18
Dynamic content addressable memory cell Grant 6,483,733 - Lines , et al. November 19, 2	2002-11-19
Memory system having synchronous-link DRAM (SLDRAM) devices and controller Grant 6,442,644 - Gustavson , et al. August 27, 2	2002-08-27
Delayed locked loop implementation in a synchronous dynamic random access memory App 20020075747 - Foss, Richard C. ; et al.	2002-06-20
Boosted voltage supply App 20020075706 - Foss, Richard C. ; et al.	2002-06-20
Dynamic content addressable memory cell App 20020044475 - Lines, Valerie ; et al.	2002-04-18
Searchline control circuit and power reduction method App 20020015348 - Gillingham, Peter B. ; et al.	2002-02-07
Variable length pipeline with parallel functional units App 20020010831 - DeMone, Paul W. ; et al.	2002-01-24
Dynamic content addressable memory cell Grant 6,320,777 - Lines , et al. November 20, 2	2001-11-20
Delayed locked loop implementation in a synchronous dynamic random access memory Grant 6,314,052 - Foss , et al. November 6, 2	2001-11-06
High voltage boosted word line supply charge pump and regulator for dram App 20010009518 - Foss, Richard C. ; et al.	2001-07-26
Variable length pipeline with parallel functional units Grant 6,266,750 - DeMone , et al. July 24, 2	2001-07-24
Delayed locked loop implementation in a synchronous dynamic random access memory App 20010001601 - Foss, Richard C. ; et al.	2001-05-24
High voltage boosted word line supply charge pump and regulator for DRAM Grant 6,236,581 - Foss , et al. May 22, 2	2001-05-22
Delayed locked loop implementation in a synchronous dynamic random access memory Grant 6,205,083 - Foss , et al. March 20, 2	2001-03-20
Method of multi-level storage in DRAM and apparatus thereof Grant RE37,072 - Gillingham February 27, 2	2001-02-27
Delayed locked loop implementation in a synchronous dynamic random access memory Grant 6,067,272 - Foss , et al. May 23, 2	2000-05-23
Precharge-enable self boosting word line driver for an embedded DRAM Grant 5,923,596 - Wu , et al. July 13, 1	1999-07-13
Flexible DRAM array Grant 5,903,511 - Gillingham May 11, 1	1999-05-11
Integrated circuit with non-binary decoding and data access Grant 5,854,763 - Gillingham , et al. December 29, 1	1998-12-29
Delay locked loop implementation in a synchronous dynamic random access memory Grant 5,796,673 - Foss , et al. August 18, 1	1998-08-18
Flexible DRAM array Grant 5,724,286 - Gillingham March 3, 1	1998-03-03
Column redundancy scheme for DRAM using normal and redundant column decoders programmed with defective array address and defective column address Grant 5,708,619 - Gillingham January 13, 1	1998-01-13
High voltage boosted word line supply charge pump and regulator for dram Grant 5,699,313 - Foss , et al. December 16, 1	1997-12-16
Method of multilevel DRAM sense and restore Grant 5,612,912 - Gillingham March 18, 1	1997-03-18
Memory cell and wordline driver for embedded DRAM in ASIC process Grant 5,600,598 - Skjaveland , et al. February 4, 1	1997-02-04
Method of multilevel dram sense and restore Grant 5,532,955 - Gillingham July 2, 1	1996-07-02
Column redundancy scheme for DRAM using normal and redundant column decoders programmed with defective array address and defective column address Grant 5,469,401 - Gillingham November 21, 1	1995-11-21
Dynamic random access memory using imperfect isolating transistors Grant 5,414,662 - Foss , et al. May 9, 1	1995-05-09
High voltage boosted word line supply charge pump and regulator for DRAM Grant 5,406,523 - Foss , et al. April 11, 1	1995-04-11
Dram column address latching technique Grant 5,305,283 - Shimokura , et al. April 19, 1	1994-04-19
Method of multi-level storage in DRAM Grant 5,283,761 - Gillingham February 1, 1	1994-02-01
High voltage boosted word line supply charge pump regulator for DRAM Grant 5,267,201 - Foss , et al. November 30, 1	1993-11-30
Transition detection circuit Grant 5,198,708 - Gillingham March 30, 1	1993-03-30
Bandgap voltage generator Grant 5,144,223 - Gillingham September 1, 1	1992-09-01