| Patent | Date |
|---|
Single level metal memory cell using chalcogenide cladding
Grant 7,223,688 - Lowrey , et al. May 29, 2 | 2007-05-29 |
Single level metal memory cell using chalcogenide cladding
Grant 7,157,304 - Lowrey , et al. January 2, 2 | 2007-01-02 |
Using a phase change memory as a replacement for a buffered flash memory
App 20060056233 - Parkinson; Ward D. ; et al. | 2006-03-16 |
Isolating phase change memories with schottky diodes and guard rings
Grant 6,995,446 - Karpov , et al. February 7, 2 | 2006-02-07 |
Using an MOS select gate for a phase change memory
Grant 6,912,146 - Gill , et al. June 28, 2 | 2005-06-28 |
Single level metal memory cell using chalcogenide cladding
Grant 6,836,423 - Lowrey , et al. December 28, 2 | 2004-12-28 |
Single level metal memory cell using chalcogenide cladding
App 20040208039 - Lowrey, Tyler A. ; et al. | 2004-10-21 |
Silicon on insulator phase change memory
Grant 6,791,107 - Gill , et al. September 14, 2 | 2004-09-14 |
Using An Mos Select Gate For A Phase Change Memory
App 20040113134 - Gill, Manzur ; et al. | 2004-06-17 |
Isolating phase change memory devices
App 20040113183 - Karpov, Ilya ; et al. | 2004-06-17 |
Method and apparatus to program a phase change memory
Grant 6,625,054 - Lowrey , et al. September 23, 2 | 2003-09-23 |
Single level metal memory cell using chalcogenide cladding
App 20030156482 - Lowrey, Tyler A. ; et al. | 2003-08-21 |
Phase-change memory cell using silicon on insulator
App 20030132501 - Gill, Manzur ; et al. | 2003-07-17 |
Method and apparatus to program a phase change memory
App 20030123277 - Lowrey, Tyler ; et al. | 2003-07-03 |
Single level metal memory cell using chalcogenide cladding
App 20030090922 - Lowrey, Tyler A. ; et al. | 2003-05-15 |
Technique And Apparatus For Performing Write Operations To A Phase Change Material Memory Device
App 20030081451 - Lowrey, Tyler A. ; et al. | 2003-05-01 |
Technique and apparatus for performing write operations to a phase change material memory device
Grant 6,545,907 - Lowrey , et al. April 8, 2 | 2003-04-08 |
Method of forming a phase-change memory cell using silicon on insulator low electrode in charcogenide elements
Grant 6,531,373 - Gill , et al. March 11, 2 | 2003-03-11 |
Phase-change memory cell using silicon on insulator
App 20020081804 - Gill, Manzur ; et al. | 2002-06-27 |
Memory cell array with LOCOS free isolation
Grant 5,740,105 - Gill April 14, 1 | 1998-04-14 |
Method for forming field oxide regions
Grant 5,661,060 - Gill , et al. August 26, 1 | 1997-08-26 |
EEPROM devices with smaller cell size
Grant 5,570,314 - Gill October 29, 1 | 1996-10-29 |
Method of making EPROM with separate erasing and programming regions
Grant 5,565,371 - Gill October 15, 1 | 1996-10-15 |
Low-voltage EEPROM using charge-pumped word lines
Grant 5,537,362 - Gill , et al. July 16, 1 | 1996-07-16 |
Method of making an EEPROM cell with separate erasing and programming regions
Grant 5,523,249 - Gill , et al. June 4, 1 | 1996-06-04 |
Method of making contract-free floating-gate memory array with silicided buried bitlines and with single-step defined floating gates
Grant 5,420,060 - Gill , et al. * May 30, 1 | 1995-05-30 |
Method of making EEPROM array with buried N+ windows and with separate erasing and programming regions
Grant 5,371,031 - Gill , et al. December 6, 1 | 1994-12-06 |
MOSFET cell array
Grant 5,365,082 - Gill , et al. November 15, 1 | 1994-11-15 |
EEPROM cell array with tight erase distribution
Grant 5,354,703 - Gill October 11, 1 | 1994-10-11 |
CMOS memory cell array
Grant 5,350,706 - McElroy , et al. September 27, 1 | 1994-09-27 |
Segmented, multiple-decoder memory array and method for programming a memory array
Grant 5,313,432 - Lin , et al. May 17, 1 | 1994-05-17 |
Self-aligned contact process for complementary field-effect integrated circuits
Grant 5,283,203 - Gill , et al. February 1, 1 | 1994-02-01 |
Wordline driver circuit for EEPROM memory cell
Grant 5,265,052 - D'Arrigo , et al. November 23, 1 | 1993-11-23 |
Contact-free floating-gate memory array with silicided buried bitlines and with single-step-defined floating gates
Grant 5,262,846 - Gill , et al. November 16, 1 | 1993-11-16 |
Method of manufacturing an EEPROM with trench-isolated bitlines
Grant 5,173,436 - Gill , et al. December 22, 1 | 1992-12-22 |
Electrically programmable, electrically erasable memory array cell with field plate
Grant 5,168,335 - D'Arrigo , et al. December 1, 1 | 1992-12-01 |
Diffusionless conductor/oxide semiconductor field effect transistor and methods for making and using the same
Grant 5,162,879 - Gill November 10, 1 | 1992-11-10 |
Fabricating an electrically-erasable, electrically-programmable read-only memory having a tunnel window insulator and thick oxide isolation between wordlines
Grant 5,156,991 - Gill , et al. * October 20, 1 | 1992-10-20 |
Method of making an electrically-erasable, electrically-programmable read-only memory cell with self-aligned tunnel
Grant 5,155,055 - Gill , et al. October 13, 1 | 1992-10-13 |
Integrated circuit with improved capacitive coupling
Grant 5,151,760 - Gill , et al. September 29, 1 | 1992-09-29 |
Diffusionless source/drain conductor electrically-erasable, electrically-programmable read-only memory and method for making and using the same
Grant 5,150,179 - Gill September 22, 1 | 1992-09-22 |
Method of making nonvolatile memory array having cells with two tunelling windows
Grant 5,147,816 - Gill , et al. * September 15, 1 | 1992-09-15 |
Nonvolatile memory cell with field-plate switch
Grant 5,134,449 - Gill , et al. July 28, 1 | 1992-07-28 |
Floating-gate memory array with silicided buried bitlines and with single-step-defined floating gates
Grant 5,120,571 - Gill , et al. June 9, 1 | 1992-06-09 |
Cross-point contact-free floating-gate memory array with silicided buried bitlines
Grant 5,110,753 - Gill , et al. May 5, 1 | 1992-05-05 |
Nonvolatile memory array having cells with two tunnelling windows
Grant 5,103,273 - Gill , et al. April 7, 1 | 1992-04-07 |
Method of making a diffusionless virtual drain and source conductor/oxide semiconductor field effect transistor
Grant 5,063,171 - Gill November 5, 1 | 1991-11-05 |
Hot electron programmable, tunnel electron erasable contactless EEPROM
Grant 5,060,195 - Gill , et al. October 22, 1 | 1991-10-22 |
Method of making an EEPROM with improved capacitive coupling between control gate and floating gate
Grant 5,057,446 - Gill , et al. October 15, 1 | 1991-10-15 |
Bit and block erasing of an electrically erasable and programmable read-only memory array
Grant 5,047,981 - Gill , et al. September 10, 1 | 1991-09-10 |
Method of making a high-speed 2-transistor cell for programmable/EEPROM devices with separate read and write transistors
Grant 5,045,489 - Gill , et al. September 3, 1 | 1991-09-03 |
Method of making a nonvolatile memory array having cells with separate program and erase regions
Grant 5,045,491 - Gill , et al. September 3, 1 | 1991-09-03 |
Cross-point contact-free floating-gate memory array with silicided buried bitlines
Grant 5,025,494 - Gill , et al. June 18, 1 | 1991-06-18 |
Process for minimizing lateral distance between elements in an integrated circuit by using sidewall spacers
Grant 5,017,515 - Gill May 21, 1 | 1991-05-21 |
Electrically-erasable, electrically-programmable read-only memory cell
Grant 5,017,980 - Gill , et al. May 21, 1 | 1991-05-21 |
Electrically-erasable, electrically-programmable read-only memory
Grant 5,012,307 - Gill , et al. April 30, 1 | 1991-04-30 |
Method of making hot electron programmable, tunnel electron erasable contactless EEPROM
Grant 5,010,028 - Gill , et al. April 23, 1 | 1991-04-23 |
Electrically programmable and erasable memory cells with field plate conductor defined drain regions
Grant 4,947,222 - Gill , et al. August 7, 1 | 1990-08-07 |
Driving circuitry for EEPROM memory cell
Grant 4,823,318 - D'Arrigo , et al. April 18, 1 | 1989-04-18 |
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