loadpatents
name:-0.016056060791016
name:-0.015684127807617
name:-0.0016958713531494
Gill; Jason P. Patent Filings

Gill; Jason P.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Gill; Jason P..The latest application filed is for "method and structure for determining thermal cycle reliability".

Company Profile
0.15.16
  • Gill; Jason P. - Essex VT
  • Gill; Jason P. - Essex Junction VT US
  • Gill; Jason P. - Hopewell Junction NY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method and structure for determining thermal cycle reliability
Grant 9,443,776 - Filippi , et al. September 13, 2
2016-09-13
Method And Structure For Determining Thermal Cycle Reliability
App 20150262899 - FILIPPI; RONALD G. ;   et al.
2015-09-17
Micro-electro-mechanical-system temperature sensor
Grant 8,480,302 - Gill , et al. July 9, 2
2013-07-09
Micro-electro-mechanical-system Temperature Sensor
App 20120076172 - Gill; Jason P. ;   et al.
2012-03-29
Low leakage metal-containing cap process using oxidation
Grant 7,867,897 - Gambino , et al. January 11, 2
2011-01-11
Via bottom contact and method of manufacturing same
Grant 7,830,019 - Chanda , et al. November 9, 2
2010-11-09
Structure for modeling stress-induced degradation of conductive interconnects
Grant 7,692,439 - Chanda , et al. April 6, 2
2010-04-06
Low Leakage Metal-containing Cap Process Using Oxidation
App 20100021656 - Gambino; Jeffrey P. ;   et al.
2010-01-28
Structure for monitoring stress-induced degradation of conductive interconnects
Grant 7,639,032 - Chanda , et al. December 29, 2
2009-12-29
Low leakage metal-containing cap process using oxidation
Grant 7,598,614 - Gambino , et al. October 6, 2
2009-10-06
VIA bottom contact and method of manufacturing same
Grant 7,585,764 - Chanda , et al. September 8, 2
2009-09-08
Via Bottom Contact And Method Of Manufacturing Same
App 20090200673 - Chanda; Kaushik ;   et al.
2009-08-13
Enhancement of performance of a conductive wire in a multilayered substrate
Grant 7,511,378 - Gill , et al. March 31, 2
2009-03-31
Non-destructive evaluation of microstructure and interface roughness of electrically conducting lines in semiconductor integrated circuits in deep sub-micron regime
Grant 7,500,208 - Chen , et al. March 3, 2
2009-03-03
Structure for modeling stress-induced degradation of conductive interconnects
App 20080231312 - Chanda; Kaushik ;   et al.
2008-09-25
Programmable Resistor, Switch Or Vertical Memory Cell
App 20080173975 - Chen; Fen ;   et al.
2008-07-24
Structure and method for monitoring stress-induced degradation of conductive interconnects
Grant 7,397,260 - Chanda , et al. July 8, 2
2008-07-08
Method for monitoring stress-induced degradation of conductive interconnects
App 20080107149 - Chanda; Kaushik ;   et al.
2008-05-08
Low Leakage Metal-containing Cap Process Using Oxidation
App 20070235875 - Gambino; Jeffrey P. ;   et al.
2007-10-11
Contact Via Scheme With Staggered Vias
App 20070176295 - Chinthakindi; Anil K. ;   et al.
2007-08-02
Determination of grain sizes of electrically conductive lines in semiconductor integrated circuits
Grant 7,231,617 - Chen , et al. June 12, 2
2007-06-12
Non-destructive Evaluation Of Microstructure And Interface Roughness Of Electrically Conducting Lines In Semiconductor Integrated Circuits In Deep Sub-micron Regime
App 20070130551 - Chen; Fen ;   et al.
2007-06-07
Structure And Method For Monitoring Stress-induced Degradation Of Conductive Interconnects
App 20070115018 - Chanda; Kaushik ;   et al.
2007-05-24
Via Bottom Contact And Method Of Manufacturing Same
App 20070037403 - Chanda; Kaushik ;   et al.
2007-02-15
Structure and method for local resistor element in integrated circuit technology
Grant 7,166,904 - Gill , et al. January 23, 2
2007-01-23
Enhancement of performance of a conductive wire in a multilayered substrate
App 20060226142 - Gill; Jason P. ;   et al.
2006-10-12
Enhancement of performance of a conductive wire in a multilayered substrate
Grant 7,096,450 - Gill , et al. August 22, 2
2006-08-22
Non-destructive Evaluation Of Microstructure And Interface Roughness Of Electrically Conducting Lines In Semiconductor Integrated Circuits In Deep Sub-micron Regime
App 20060071676 - Chen; Fen ;   et al.
2006-04-06
Structure And Method For Local Resistor Element In Integrated Circuit Technology
App 20050167786 - Gill, Jason P. ;   et al.
2005-08-04
Enhancement Of Performance Of A Conductive Wire In A Multilayered Substrate
App 20040262031 - Gill, Jason P. ;   et al.
2004-12-30

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