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Patent applications and USPTO patent grants for Gibbs; Gary A..The latest application filed is for "magnetic memory array with an improved world line configuration".
Patent | Date |
---|---|
Magnetic memory array with an improved world line configuration Grant 7,095,647 - Jenne , et al. August 22, 2 | 2006-08-22 |
Non-volatile latch with magnetic junctions Grant 7,082,053 - Jenne , et al. July 25, 2 | 2006-07-25 |
Magnetic memory array configuration Grant 7,057,919 - Jenne , et al. June 6, 2 | 2006-06-06 |
Memory circuit with selective address path Grant 6,775,191 - Pancholy , et al. August 10, 2 | 2004-08-10 |
Multi-level programmable voltage control and output buffer with selectable operating voltage Grant 6,664,810 - Pancholy , et al. December 16, 2 | 2003-12-16 |
Direct bit line-bit line defect detection test mode for SRAM Grant 6,388,927 - Churchill , et al. May 14, 2 | 2002-05-14 |
Bi-CMOS semiconductor memory cell Grant 4,933,899 - Gibbs June 12, 1 | 1990-06-12 |
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