Ghosh Dastidar; Jayabrata

Patent Applications and Registrations

Patent applications and USPTO patent grants for Ghosh Dastidar; Jayabrata.The latest application filed is for "clock control circuitry and methods of utilizing the clock control circuitry".

Company Profile

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Ghosh Dastidar; Jayabrata - Campbell CA
Ghosh Dastidar; Jayabrata - Santa Clara CA US
Ghosh Dastidar; Jayabrata - San Jose CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Clock control circuitry and methods of utilizing the clock control circuitry Grant 9,075,112 - Kantipudi , et al. July 7, 2	2015-07-07
Clock control circuitry and methods of utilizing the clock control circuitry Grant 8,621,303 - Kantipudi , et al. December 31, 2	2013-12-31
Automatic test pattern generation system for programmable logic devices Grant 8,516,322 - Ghosh Dastidar , et al. August 20, 2	2013-08-20
Logic circuit testing with reduced overhead Grant 7,996,743 - Tan , et al. August 9, 2	2011-08-09
Testing circuitry for programmable logic devices with selectable power supply voltages Grant 7,571,413 - Ghosh Dastidar , et al. August 4, 2	2009-08-04
Configurable built in self test circuitry for testing memory arrays Grant 7,475,315 - Natarajan , et al. January 6, 2	2009-01-06
Method and apparatus for testing integrated circuits Grant 7,424,658 - Ghosh Dastidar September 9, 2	2008-09-09
Method and apparatus for bit mapping memories in programmable logic device integrated circuits during at-speed testing Grant 7,266,028 - Ghosh Dastidar September 4, 2	2007-09-04

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