loadpatents
name:-0.018527030944824
name:-0.0096979141235352
name:-0.0056040287017822
GHAMESHLU; Majid Patent Filings

GHAMESHLU; Majid

Patent Applications and Registrations

Patent applications and USPTO patent grants for GHAMESHLU; Majid.The latest application filed is for "method and system for predictive maintenance of integrated circuits".

Company Profile
4.8.15
  • GHAMESHLU; Majid - Wien AT
  • Ghameshlu; Majid - Vienna AT
  • Ghameshlu, Majid - A-Wien AU
  • Ghameshlu, Majid - Kopalgasse AT
  • Ghameshlu, Majid - US
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method and System for Predictive Maintenance of Integrated Circuits
App 20200166568 - EPPENSTEINER; Friedrich ;   et al.
2020-05-28
Method for adjusting pull resistors of an electronic module
Grant 10,416,738 - Eppensteiner , et al. Sept
2019-09-17
Method and circuit arrangement for temporally limiting and separately accessing a system on a chip
Grant 10,318,458 - Eppensteiner , et al.
2019-06-11
Method for protecting an integrated circuit against unauthorized access
Grant 10,311,253 - Eppensteiner , et al.
2019-06-04
Method and circuit arrangement for protecting against scanning of an address space
Grant 10,133,881 - Eppensteiner , et al. November 20, 2
2018-11-20
Method for Adjusting Pull Resistors of an Electronic Module
App 20170199555 - EPPENSTEINER; Friedrich ;   et al.
2017-07-13
Method For Protecting An Integrated Circuit Against Unauthorized Access
App 20160203325 - EPPENSTEINER; Friedrich ;   et al.
2016-07-14
Method and Circuit Arrangement for Protecting Against Scanning of an Address Space
App 20160203341 - EPPENSTEINER; Friedrich ;   et al.
2016-07-14
Method and Circuit Arrangement for Temporally Limiting and Separately Access in a System on a Chip
App 20160203092 - EPPENSTEINER; Friedrich ;   et al.
2016-07-14
Method And Circuit Arrangement For Accessing Slave Units In A System On Chip In A Controlled Manner
App 20160004647 - EPPENSTEINER; Friedrich ;   et al.
2016-01-07
Method For Producing A Dpa-resistant Logic Circuit
App 20150095861 - Eppensteiner; Friedrich ;   et al.
2015-04-02
Integrated circuit including duplicated synchronous and asynchronous components
Grant 6,892,345 - Ghameshlu , et al. May 10, 2
2005-05-10
Electronic component and method for measuring its qualification
App 20050015689 - Eppensteiner, Friedrich ;   et al.
2005-01-20
Electronic component
App 20050005216 - Ghameshlu, Majid ;   et al.
2005-01-06
Electronic component with output buffer control
App 20050005212 - Ghameshlu, Majid ;   et al.
2005-01-06
Method for developing an electronic component
App 20040139410 - Ghameshlu, Majid ;   et al.
2004-07-15
Method and device for testing the mapping/implementation of a model of a logic circuit onto/in a hardware emulator
App 20040107393 - Taucher, Herbert ;   et al.
2004-06-03
Low redesign application-specific module
Grant 6,742,150 - Ghameshlu , et al. May 25, 2
2004-05-25
Duplicable processor device
Grant 6,694,449 - Ghameshlu , et al. February 17, 2
2004-02-17
Partial BIST with recording of the connections between individual blocks
App 20040030976 - Ghameshlu, Majid ;   et al.
2004-02-12
System and method for testing electronic devices and modules
App 20040015330 - Ghameshlu, Majid ;   et al.
2004-01-22
Integrated circuit comprising at least two clock systems
Grant 6,639,442 - Ghameshlu , et al. October 28, 2
2003-10-28
Duplicable processor device
App 20010025352 - Ghameshlu, Majid ;   et al.
2001-09-27

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