Geuskens; Bibiche M.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Geuskens; Bibiche M..The latest application filed is for "methods and systems to selectively boost an operating voltage of, and controls to an 8t bit-cell array and/or other logic blocks".

Company Profile

4.13.11

Geuskens; Bibiche M. - Beaverton OR
Geuskens; Bibiche M - Beaverton OR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Methods and systems to selectively boost an operating voltage of, and controls to an 8T bit-cell array and/or other logic blocks Grant 10,984,855 - Kulkarni , et al. April 20, 2	2021-04-20
Methods And Systems To Selectively Boost An Operating Voltage Of, And Controls To An 8t Bit-cell Array And/or Other Logic Blocks App 20190362777 - Kulkarni; Jaydeep P. ; et al.	2019-11-28
Methods and systems to selectively boost an operating voltage of, and controls to an 8T bit-cell array and/or other logic blocks Grant 10,217,509 - Kulkarni , et al. Feb	2019-02-26
Methods And Systems To Selectively Boost An Operating Voltage Of, And Controls To An 8t Bit-cell Array And/or Other Logic Blocks App 20170243637 - Kulkarni; Jaydeep P. ; et al.	2017-08-24
Methods and systems to selectively boost an operating voltage of, and controls to an 8T bit-cell array and/or other logic blocks Grant 9,633,716 - Kulkarni , et al. April 25, 2	2017-04-25
Apparatus for reducing write minimum supply voltage for memory Grant 9,627,039 - Kulkarni , et al. April 18, 2	2017-04-18
Methods And Systems To Selectively Boost An Operating Voltage Of, And Controls To An 8t Bit-cell Array And/or Other Logic Blocks App 20160225438 - Kulkarni; Jaydeep P. ; et al.	2016-08-04
Apparatus For Reducing Write Minimum Supply Voltage For Memory App 20160141022 - Kulkarni; Jaydeep P. ; et al.	2016-05-19
Methods and systems to selectively boost an operating voltage of, and controls to an 8T bit-cell array and/or other logic blocks Grant 9,299,395 - Kulkarni , et al. March 29, 2	2016-03-29
Apparatus for reducing write minimum supply voltage for memory Grant 9,153,304 - Kulkarni , et al. October 6, 2	2015-10-06
Methods And Systems To Selectively Boost An Operating Voltage Of, And Controls To An 8t Bit-cell Array And/or Other Logic Blocks App 20150009751 - Kulkarni; Jaydeep P. ; et al.	2015-01-08
Reducing minimum operating voltage through hybrid cache design Grant 8,868,836 - Khellah , et al. October 21, 2	2014-10-21
Apparatus For Reducing Write Minimum Supply Voltage For Memory App 20140003132 - Kulkarni; Jaydeep P. ; et al.	2014-01-02
Memory write operation methods and circuits Grant 8,467,263 - Kulkarni , et al. June 18, 2	2013-06-18
Method and system to lower the minimum operating voltage of a memory array Grant 8,094,505 - Khellah , et al. January 10, 2	2012-01-10
Memory Write Operation Methods And Circuits App 20110317508 - KULKARNI; JAYDEEP P. ; et al.	2011-12-29
Method And System To Lower The Minimum Operating Voltage Of A Memory Array App 20110085389 - Khellah; Muhammad M. ; et al.	2011-04-14
Reducing minimum operating voltage through hybrid cache design App 20090172283 - Khellah; Muhammad M. ; et al.	2009-07-02

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