Gersbach; John Edwin
Patent Applications and Registrations
Patent applications and USPTO patent grants for Gersbach; John Edwin.The latest application filed is for "pull-up and pull-down circuits".
- Gersbach; John Edwin - Burlington VT
| Patent | Date |
|---|---|
| Pull-up and pull-down circuits Grant 6,031,403 - Gersbach February 29, 2 | 2000-02-29 |
| Variable-speed phase-locked loop system with on-the-fly switching and method therefor Grant 5,838,205 - Ferraiolo , et al. November 17, 1 | 1998-11-17 |
| Fast locking variable frequency phase-locked loop Grant 5,757,238 - Ferraiolo , et al. May 26, 1 | 1998-05-26 |
| Digitally controlled oscillator circuit Grant 5,739,725 - Ferraiolo , et al. April 14, 1 | 1998-04-14 |
| System and method for calibrating damping factor or analog PLL Grant 5,668,503 - Gersbach , et al. September 16, 1 | 1997-09-16 |
| Self calibration segmented digital-to-analog converter Grant 5,666,118 - Gersbach September 9, 1 | 1997-09-09 |
| Scr (or Scs) Memory Array With Internal And External Load Resistors Grant 3,863,229 - Gersbach January 28, 1 | 1975-01-28 |
| Pseudo-hierarchy Memory System Grant 3,736,574 - Gersbach May 29, 1 | 1973-05-29 |
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