| Patent | Date |
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Method for forming silicon/germanium containing drain/source regions in transistors with reduced silicon/germanium loss
Grant 8,652,913 - Gehring , et al. February 18, 2 | 2014-02-18 |
Test structure for monitoring process characteristics for forming embedded semiconductor alloys in drain/source regions
Grant 8,530,894 - Mowry , et al. September 10, 2 | 2013-09-10 |
Method for producing a component provided with a multipart cover layer and said component
Grant 8,394,314 - Heinz , et al. March 12, 2 | 2013-03-12 |
SOI device having a substrate diode with process tolerant configuration and method of forming the SOI device
Grant 8,377,761 - Gehring , et al. February 19, 2 | 2013-02-19 |
Method for differential spacer removal by wet chemical etch process and device with differential spacer structure
Grant 8,298,924 - Wiatr , et al. October 30, 2 | 2012-10-30 |
Test Structure For Monitoring Process Characteristics For Forming Embedded Semiconductor Alloys In Drain/source Regions
App 20120223309 - Mowry; Anthony ; et al. | 2012-09-06 |
Test structure for monitoring process characteristics for forming embedded semiconductor alloys in drain/source regions
Grant 8,227,266 - Mowry , et al. July 24, 2 | 2012-07-24 |
Reducing transistor junction capacitance by recessing drain and source regions
Grant 8,183,605 - Feudel , et al. May 22, 2 | 2012-05-22 |
Method for creating tensile strain by applying stress memorization techniques at close proximity to the gate electrode
Grant 8,129,236 - Gehring , et al. March 6, 2 | 2012-03-06 |
In situ formed drain and source regions in a silicon/germanium containing transistor device
Grant 8,093,634 - Mowry , et al. January 10, 2 | 2012-01-10 |
Soi Device Having A Substrate Diode With Process Tolerant Configuration And Method Of Forming The Soi Device
App 20110183477 - Gehring; Andreas ; et al. | 2011-07-28 |
SOI device having a substrate diode with process tolerant configuration and method of forming the SOI device
Grant 7,943,442 - Gehring , et al. May 17, 2 | 2011-05-17 |
Semiconductor device having a strained semiconductor alloy concentration profile
Grant 7,939,399 - Mowry , et al. May 10, 2 | 2011-05-10 |
Method for creating tensile strain by selectively applying stress memorization techniques to NMOS transistors
Grant 7,897,451 - Wiatr , et al. March 1, 2 | 2011-03-01 |
Method for producing a component, a tool for carrying out said method and the component
Grant 7,875,336 - Heinz , et al. January 25, 2 | 2011-01-25 |
Method of forming a semiconductor structure comprising an implantation of ions of a non-doping element
Grant 7,816,199 - Feudel , et al. October 19, 2 | 2010-10-19 |
Reducing Transistor Junction Capacitance By Recessing Drain And Source Regions
App 20100237431 - Feudel; Thomas ; et al. | 2010-09-23 |
Method for creating tensile strain by repeatedly applied stress memorization techniques
Grant 7,790,537 - Wei , et al. September 7, 2 | 2010-09-07 |
Method of forming a semiconductor structure comprising a field effect transistor having a stressed channel region
Grant 7,772,077 - Gehring , et al. August 10, 2 | 2010-08-10 |
Method for reducing crystal defects in transistors with re-grown shallow junctions by appropriately selecting crystalline orientations
Grant 7,763,505 - Gehring , et al. July 27, 2 | 2010-07-27 |
Transistor having a channel with biaxial strain induced by silicon/germanium in the gate electrode
Grant 7,754,555 - Gehring , et al. July 13, 2 | 2010-07-13 |
Reducing transistor junction capacitance by recessing drain and source regions
Grant 7,754,556 - Feudel , et al. July 13, 2 | 2010-07-13 |
Test Structure For Monitoring Process Characteristics For Forming Embedded Semiconductor Alloys In Drain/source Regions
App 20100155727 - MOWRY; ANTHONY ; et al. | 2010-06-24 |
Test structure for monitoring process characteristics for forming embedded semiconductor alloys in drain/source regions
Grant 7,713,763 - Mowry , et al. May 11, 2 | 2010-05-11 |
In Situ Formed Drain And Source Regions In A Silicon/germanium Containing Transistor Device
App 20090294860 - Mowry; Anthony ; et al. | 2009-12-03 |
Method For Creating Tensile Strain By Applying Stress Memorization Techniques At Close Proximity To The Gate Electrode
App 20090246926 - Gehring; Andreas ; et al. | 2009-10-01 |
Test Structure For Monitoring Process Characteristics For Forming Embedded Semiconductor Alloys In Drain/source Regions
App 20090166618 - Mowry; Anthony ; et al. | 2009-07-02 |
Method For Creating Tensile Strain By Selectively Applying Stress Memorization Techniques To Nmos Transistors
App 20090142900 - Wiatr; Maciej ; et al. | 2009-06-04 |
Increasing Etch Selectivity During The Patterning Of A Contact Structure Of A Semiconductor Device
App 20090108415 - LENSKI; Markus ; et al. | 2009-04-30 |
Method Of Forming A Semiconductor Structure Comprising An Implantation Of Ions Of A Non-doping Element
App 20090035924 - Feudel; Thomas ; et al. | 2009-02-05 |
Reducing Transistor Junction Capacitance By Recessing Drain And Source Regions
App 20090001484 - Feudel; Thomas ; et al. | 2009-01-01 |
Method For Producing A Component, A Tool For Carrying Out Said Method And The Component
App 20080309109 - Heinz; Claus ; et al. | 2008-12-18 |
Soi Device Having A Substrate Diode With Process Tolerant Configuration And Method Of Forming The Soi Device
App 20080268585 - Gehring; Andreas ; et al. | 2008-10-30 |
Method For Creating Tensile Strain By Repeatedly Applied Stress Memorization Techniques
App 20080237723 - Wei; Andy ; et al. | 2008-10-02 |
Method For Producing a Component Provided With a Multipart Cover Layer and Said Component
App 20080233359 - Heinz; Claus ; et al. | 2008-09-25 |
Semiconductor Device Having A Strained Semiconductor Alloy Concentration Profile
App 20080203427 - Mowry; Anthony ; et al. | 2008-08-28 |
Method For Differential Spacer Removal By Wet Chemical Etch Process And Device With Differential Spacer Structure
App 20080203486 - Wiatr; Maciej ; et al. | 2008-08-28 |
Method For Forming Silicon/germanium Containing Drain/source Regions In Transistors With Reduced Silicon/germanium Loss
App 20080182371 - Gehring; Andreas ; et al. | 2008-07-31 |
Method Of Forming A Semiconductor Structure Comprising A Field Effect Transistor Having A Stressed Channel Region
App 20080102590 - Gehring; Andreas ; et al. | 2008-05-01 |
Method For Reducing Crystal Defects In Transistors With Re-grown Shallow Junctions By Appropriately Selecting Crystalline Orientations
App 20080081403 - Gehring; Andreas ; et al. | 2008-04-03 |
Method of encrypting or decrypting data packets of a data stream as well as a signal sequence and data processing system for performing the method
App 20080034197 - Engel; Christian ; et al. | 2008-02-07 |
Transistor Having A Channel With Biaxial Strain Induced By Silicon/germanium In The Gate Electrode
App 20080001178 - Gehring; Andreas ; et al. | 2008-01-03 |
Network component for a communication network, communication network, and method of providing a data connection
App 20070076882 - Engel; Christian ; et al. | 2007-04-05 |
Work piece
Grant 7,098,564 - Gehring , et al. August 29, 2 | 2006-08-29 |
Work piece
App 20040074077 - Gehring, Andreas ; et al. | 2004-04-22 |
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