Gehman; Judy M.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Gehman; Judy M..The latest application filed is for "cache system for managing various cache line conditions".

Company Profile

0.11.7

Gehman; Judy M. - Fort Collins CO
Gehman; Judy M - Fort Collins CO
Gehman; Judy M. - Ft. Collins CO

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Cache system for managing various cache line conditions Grant 9,235,521 - Lippert , et al. January 12, 2	2016-01-12
Cache System For Managing Various Cache Line Conditions App 20150026411 - Lippert; Gary M. ; et al.	2015-01-22
Circuit to efficiently handle data movement within a cache controller or on-chip memory peripheral Grant 8,510,493 - Gehman , et al. August 13, 2	2013-08-13
Circuit To Efficiently Handle Data Movement Within A Cache Controller Or On-chip Memory Peripheral App 20120166730 - Gehman; Judy M. ; et al.	2012-06-28
Managing cache line allocations for multiple issue processors Grant 8,095,734 - Lippert , et al. January 10, 2	2012-01-10
Managing Cache Line Allocations For Multiple Issue Processors App 20100281219 - Lippert; Gary ; et al.	2010-11-04
System and method for implementing multiple instantiated configurable peripherals in a circuit design Grant 7,620,743 - Gehman , et al. November 17, 2	2009-11-17
Process and apparatus for abstracting IC design files Grant 7,584,460 - Broberg, III , et al. September 1, 2	2009-09-01
Endian mapping engine, method of endian mapping and a processing system employing the engine and the method App 20070150627 - Gehman; Judy M. ; et al.	2007-06-28
System and method for implementing multiple instantiated configurable peripherals in a circuit design App 20050229143 - Gehman, Judy M. ; et al.	2005-10-13
System and method for implementing multiple instantiated configurable peripherals in a circuit design App 20050223388 - Gehman, Judy M. ; et al.	2005-10-06
Process and apparatus for abstracting IC design files App 20050022155 - Broberg, Robert N.C. III ; et al.	2005-01-27
Grant removal via dummy master arbitration Grant 6,785,755 - Holm , et al. August 31, 2	2004-08-31
Automatic deadlock prevention via arbitration switching Grant 6,745,273 - Gehman , et al. June 1, 2	2004-06-01
Direct attach of interrupt controller to processor module Grant 6,496,517 - Gehman , et al. December 17, 2	2002-12-17
System and method for coordinating competing register accesses by multiple buses Grant 6,115,770 - Gehman September 5, 2	2000-09-05
Priority arbiter with shifting sequential priority scheme Grant 6,073,132 - Gehman June 6, 2	2000-06-06

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.