Gee; Harry Yue

Patent Applications and Registrations

Patent applications and USPTO patent grants for Gee; Harry Yue.The latest application filed is for "semiconductor component having an esd protection device".

Company Profile

0.21.15

Gee; Harry Yue - Santa Clara CA
Gee; Harry Yue - Milpitas CA
Gee; Harry Yue - Sunnyvale CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method for fabricating an array of 4F2 resistive non-volatile memory in a NAND architecture Grant 10,847,579 - Nazarian , et al. November 24, 2	2020-11-24
4F2 resistive non-volatile memory formed in a NAND architecture Grant 10,453,896 - Nazarian , et al. Oc	2019-10-22
Integrative resistive memory in backend metal layers Grant 10,319,908 - Narayanan , et al.	2019-06-11
Scalable silicon based resistive memory device Grant 10,290,801 - Narayanan , et al.	2019-05-14
Semiconductor Component Having An Esd Protection Device App 20180374931 - SHARMA; Umesh ; et al.	2018-12-27
Recessed high voltage metal oxide semiconductor transistor for RRAM cell Grant 10,115,819 - Gee , et al. October 30, 2	2018-10-30
Method for manufacturing a semiconductor device Grant 10,109,718 - Sharma , et al. October 23, 2	2018-10-23
Monolithically integrated resistive memory using integrated-circuit foundry compatible processes Grant 10,096,653 - Narayanan , et al. October 9, 2	2018-10-09
Flatness of memory cell surfaces Grant 10,062,845 - Gee , et al. August 28, 2	2018-08-28
Monolithically integrated resistive memory using integrated-circuit foundry compatible processes Grant 9,741,765 - Narayanan , et al. August 22, 2	2017-08-22
High density selector-based non volatile memory cell and fabrication Grant 9,698,201 - Nazarian , et al. July 4, 2	2017-07-04
Selector-based non-volatile cell fabrication utilizing IC-foundry compatible process Grant 9,685,483 - Nazarian , et al. June 20, 2	2017-06-20
Sub-oxide interface layer for two-terminal memory Grant 9,601,690 - Gee , et al. March 21, 2	2017-03-21
Resistive random access memory (RRAM) cell and method for forming the RRAM cell Grant 9,595,670 - Gee , et al. March 14, 2	2017-03-14
Methods for fabricating resistive memory device switching material using ion implantation Grant 9,583,701 - Gee , et al. February 28, 2	2017-02-28
ESD device and structure therefor Grant 9,564,424 - Marreiro , et al. February 7, 2	2017-02-07
Recessed High Voltage Metal Oxide Semiconductor Transistor For Rram Cell App 20160351625 - Gee; Harry Yue ; et al.	2016-12-01
High Density Selector-based Non Volatile Memory Cell And Fabrication App 20160268341 - Nazarian; Hagop ; et al.	2016-09-15
Mitigating damage from a chemical mechanical planarization process Grant 9,437,814 - Gee , et al. September 6, 2	2016-09-06
Method for surface roughness reduction after silicon germanium thin film deposition Grant 9,425,046 - Gee , et al. August 23, 2	2016-08-23
Method Of Forming An Esd Device And Structure Therefor App 20160225756 - MARREIRO; David D. ; et al.	2016-08-04
Selector-based Non-volatile Cell Fabrication Utilizing Ic-foundry Compatible Process App 20160190208 - Nazarian; Hagop ; et al.	2016-06-30
Method of forming an ESD device and structure therefor Grant 9,337,178 - Marreiro , et al. May 10, 2	2016-05-10
Integrative Resistive Memory In Backend Metal Layers App 20150318333 - Narayanan; Sundar ; et al.	2015-11-05
Sub-oxide interface layer for two-terminal memory Grant 9,166,163 - Gee , et al. October 20, 2	2015-10-20
Monolithically Integrated Resistive Memory Using Integrated-circuit Foundry Compatible Processes App 20150243886 - Narayanan; Sundar ; et al.	2015-08-27
Scalable Silicon Based Resistive Memory Device App 20150228893 - Narayanan; Sundar ; et al.	2015-08-13
Method For Manufacturing A Semiconductor Device App 20140242771 - Sharma; Umesh ; et al.	2014-08-28
Method Of Forming An Esd Device And Structure Therefor App 20140159108 - Marreiro; David D. ; et al.	2014-06-12
Sub-oxide Interface Layer For Two-terminal Memory App 20140145135 - GEE; Harry Yue ; et al.	2014-05-29
Esd Device And Method App 20120080769 - Sharma; Umesh ; et al.	2012-04-05
Method of making reliable wafer level chip scale package semiconductor devices Grant 7,972,521 - Sharma , et al. July 5, 2	2011-07-05
Low operating voltage electro-static discharge device and method Grant 7,576,370 - Gee , et al. August 18, 2	2009-08-18
High Current Steering ESD Protection Zener Diode And Method App 20080258263 - Gee; Harry Yue ; et al.	2008-10-23
Low Operating Voltage Electro-Static Discharge Device And Method App 20080259518 - Gee; Harry Yue ; et al.	2008-10-23
Method of Making Reliable Wafer Level Chip Scale Package Semiconductor Devices App 20080227240 - Sharma; Umesh ; et al.	2008-09-18

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