| Patent | Date |
|---|
Semiconductor Structures For Latch-up Suppression And Methods Of Forming Such Semiconductor Structures
App 20080057671 - Furukawa; Toshiharu ; et al. | 2008-03-06 |
Method Of Forming High Voltage N-ldmos Transistors Having Shallow Trench Isolation Region With Drain Extensions
App 20070284659 - Abadeer; Wagdi W. ; et al. | 2007-12-13 |
Method And Structure To Process Thick And Thin Fins And Variable Fin To Fin Spacing
App 20070284669 - Abadeer; Wagdi W. ; et al. | 2007-12-13 |
Electrostatic Discharge Protection Device And Method Of Fabricating Same
App 20070262345 - Gauthier; Robert J. JR. ; et al. | 2007-11-15 |
Semiconductor Structures For Latch-up Suppression And Methods Of Forming Such Semiconductor Structures
App 20070241409 - Furukawa; Toshiharu ; et al. | 2007-10-18 |
Apparatus And Method For Improved Triggering And Oscillation Suppression Of Esd Clamping Devices
App 20070201173 - Chu; Albert M. ; et al. | 2007-08-30 |
Semiconductor structures for latch-up suppression and methods of forming such semiconductor structures
App 20070170518 - Furukawa; Toshiharu ; et al. | 2007-07-26 |
Method And Structure To Process Thick And Thin Fins And Variable Fin To Fin Spacing
App 20070170521 - Abadeer; Wagdi W. ; et al. | 2007-07-26 |
Methods and semiconductor structures for latch-up suppression using a buried conductive region
App 20070158755 - Chang; Shunhua Thomas ; et al. | 2007-07-12 |
Methods and semiconductor structures for latch-up suppression using a buried damage layer
App 20070158779 - Cannon; Ethan Harrison ; et al. | 2007-07-12 |
On Demand Circuit Function Execution Employing Optical Sensing
App 20070127172 - Abadeer; Wagdi W. ; et al. | 2007-06-07 |
High Voltage Esd Power Clamp
App 20070097570 - CHATTY; Kiran V. ; et al. | 2007-05-03 |
Apparatus And Method For Improved Triggering And Leakage Current Control Of Esd Clamping Devices
App 20070053120 - Gauthier; Robert J. JR. ; et al. | 2007-03-08 |
Vertical Silicon Controlled Rectifier Electro-static Discharge Protection Device In Bi-cmos Technology
App 20070023866 - Chatty; Kiran V. ; et al. | 2007-02-01 |
Inverted Multilayer Semiconductor Device Assembly
App 20060226491 - Gauthier; Robert J. Jr. ; et al. | 2006-10-12 |
E-Fuse and anti-E-Fuse device structures and methods
App 20060220174 - Brown; Jeffrey S. ; et al. | 2006-10-05 |
Low Trigger Voltage, Low Leakage Esd Nfet
App 20060157799 - Chatty; Kiran V. ; et al. | 2006-07-20 |
High Voltage Esd Power Clamp
App 20060072267 - Chatty; Kiran V. ; et al. | 2006-04-06 |
Resettable fuse device and method of fabricating the same
App 20060060938 - Abadeer; Wagdi William ; et al. | 2006-03-23 |
Low Trigger Voltage Esd Nmosfet Triple-well Cmos Devices
App 20050224882 - Chatty, Kiran V. ; et al. | 2005-10-13 |
Method For Creating A Self-aligned Soi Diode By Removing A Polysilicon Gate During Processing
App 20050227418 - Chatty, Kiran V. ; et al. | 2005-10-13 |
MOSFET with decoupled halo before extension
App 20050186744 - Abadeer, Wagdi W. ; et al. | 2005-08-25 |
High voltage N-LDMOS transistors having shallow trench isolation region
App 20050090049 - Abadeer, Wagdi W. ; et al. | 2005-04-28 |
Method and structure to suppress external latch-up
App 20050085028 - Chatty, Kiran V. ; et al. | 2005-04-21 |
Electro-static Discharge Protection Circuit
App 20050068702 - Connor, John ; et al. | 2005-03-31 |
Pfet-based Esd Protection Strategy For Improved External Latch-up Robustness
App 20050045952 - Chatty, Kiran V. ; et al. | 2005-03-03 |
High Voltage N-ldmos Transistors Having Shallow Trench Isolation Region
App 20040222488 - Abadeer, Wagdi W. ; et al. | 2004-11-11 |
Test structure and methodology for semiconductor stress-induced defects and antifuse based on same test structure
App 20040113234 - Abadeer, Wagdi W. ; et al. | 2004-06-17 |
Body contact mosfet
App 20040079995 - Bryant, Andres ; et al. | 2004-04-29 |
Grounded body SOI SRAM cell
App 20040048425 - Assaderaghi, Fariborz ; et al. | 2004-03-11 |
E-Fuse and anti-E-Fuse device structures and methods
App 20040004268 - Brown, Jeffrey S. ; et al. | 2004-01-08 |
Test structure and methodology for semiconductor stress-induced defects and antifuse based on same test structure
App 20030207537 - Abadeer, Wagdi W. ; et al. | 2003-11-06 |
Body contact mosfet
App 20030141543 - Bryant, Andres ; et al. | 2003-07-31 |
Test structure and methodology for semiconductor stress-induced defects and antifuse based on same test structure
App 20030094608 - Abadeer, Wagdi W. ; et al. | 2003-05-22 |
Grounded body SOI SRAM cell
App 20030020116 - Assaderaghi, Fariborz ; et al. | 2003-01-30 |
Automation of transmission line pulse testing of electrostatic discharge devices
App 20020145432 - Allard, Harvey C. JR. ; et al. | 2002-10-10 |
Conductive coupling of electrical structures to a semiconductor device located under a buried oxide layer
App 20020113267 - Brown, Jeffrey S. ; et al. | 2002-08-22 |
Reduction of reverse short channel effects by implantation of neutral dopants
App 20020063294 - Brown, Jeffrey Scott ; et al. | 2002-05-30 |
Method For Producing A Polysilicon Circuit Element
App 20020063291 - BROWN, JEFFREY S. ; et al. | 2002-05-30 |
Asymmetrical semiconductor device for ESD protection
App 20020056882 - Gauthier,, Robert J. JR. ; et al. | 2002-05-16 |
MOSFET with lateral resistor ballasting
App 20010031552 - Gauthier, Robert J. JR. ; et al. | 2001-10-18 |
Thermal conductivity enhanced semiconductor structures and fabrication processes
App 20010029084 - Gauthier, Robert J. JR. ; et al. | 2001-10-11 |
Method And Device To Increase Latch-up Immunity In Cmos Device
App 20010011758 - BROWN, JEFFREY S ; et al. | 2001-08-09 |
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