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Silicon controlled rectifiers integrated into a heterojunction bipolar transistor process
Grant 10,727,327 - Mishra , et al. | 2020-07-28 |
Silicon Controlled Rectifiers Integrated Into A Heterojunction Bipolar Transistor Process
App 20190237568 - Mishra; Rahul ; et al. | 2019-08-01 |
Structure and method for dynamic biasing to improve ESD robustness of current mode logic (CML) drivers
Grant 10,181,463 - Di Sarro , et al. Ja | 2019-01-15 |
Scr With Fin Body Regions For Esd Protection
App 20160111414 - DI SARRO; James P. ; et al. | 2016-04-21 |
Extremely thin semiconductor-on-insulator (ETSOI) layer
Grant 9,263,517 - Abadeer , et al. February 16, 2 | 2016-02-16 |
Structure And Method For Dynamic Biasing To Improve Esd Robustness Of Current Mode Logic (cml) Drivers
App 20150363539 - Di Sarro; James P. ; et al. | 2015-12-17 |
Structure And Method For Dynamic Biasing To Improve Esd Robustness Of Current Mode Logic (cml) Drivers
App 20150364914 - Di Sarro; James P. ; et al. | 2015-12-17 |
Electrostatic discharge (ESD) device and method of fabricating
Grant 8,803,276 - Chang , et al. August 12, 2 | 2014-08-12 |
Bi-directional back-to-back stacked SCR for high-voltage pin ESD protection, methods of manufacture and design structures
Grant 8,760,831 - Abou-Khalil , et al. June 24, 2 | 2014-06-24 |
Semiconductor device heat dissipation structure
Grant 8,637,388 - Abou-Khalil , et al. January 28, 2 | 2014-01-28 |
Extremely Thin Semiconductor-on-insulator (etsoi) Layer
App 20130200486 - Chatty; Kiran V. ; et al. | 2013-08-08 |
Forming an extremely thin semiconductor-on-insulator (ETSOI) layer
Grant 8,110,483 - Abadeer , et al. February 7, 2 | 2012-02-07 |
Device structures for active devices fabricated using a semiconductor-on-insulator substrate and design structures for a radiofrequency integrated circuit
Grant 7,709,926 - Abadeer , et al. May 4, 2 | 2010-05-04 |
Methods of fabricating a device structure for use as a memory cell in a non-volatile random access memory
Grant 7,700,428 - Abadeer , et al. April 20, 2 | 2010-04-20 |
Semiconductor structures for latch-up suppression and methods of forming such semiconductor structures
Grant 7,645,676 - Furukawa , et al. January 12, 2 | 2010-01-12 |
Method For Improved Triggering And Oscillation Supression Of Esd Clamping Devices
App 20080232012 - Chu; Albert M. ; et al. | 2008-09-25 |
Electrostatic Discharge Protection Device And Method Of Fabricating Same
App 20080224172 - Gauthier; Robert J. ; et al. | 2008-09-18 |
Monitoring Of Electrostatic Discharge (esd) Events During Semiconductor Manufacture Using Esd Sensitive Resistors
App 20080145958 - Abou-Khalil; Michel J. ; et al. | 2008-06-19 |
Electrostatic Discharge Protection Device And Method Of Fabricating Same
App 20080145993 - Gauthier; Robert J. ; et al. | 2008-06-19 |
Method And Apparatus For Impedance Matching In Transmission Circuits Using Tantalum Nitride Resistor Devices
App 20080001620 - Chen; Fen ; et al. | 2008-01-03 |
RC-Triggered Power Clamp Suppressing Negative Mode Electrostatic Discharge Stress
App 20070285853 - Gauthier; Robert J. ; et al. | 2007-12-13 |
Low trigger voltage, low leakage ESD NFET
Grant 7,098,513 - Chatty , et al. August 29, 2 | 2006-08-29 |
Diffusion resistor/capacitor (DRC) non-aligned MOSFET structure
Grant 6,838,323 - Gauthier , et al. January 4, 2 | 2005-01-04 |
Diffusion resistor/capacitor (DRC) non-aligned MOSFET structure
App 20030102513 - Gauthier, Robert J. ; et al. | 2003-06-05 |
Substrate pumped ESD network with trench structure
Grant 6,411,480 - Gauthier , et al. June 25, 2 | 2002-06-25 |
Diffusion Resistor/capacitor (drc) Non-aligned Mosfet Structure
App 20020060343 - GAUTHIER, ROBERT J. ; et al. | 2002-05-23 |
Method and structure for increasing the threshold voltage of a corner device
Grant 6,097,069 - Brown , et al. August 1, 2 | 2000-08-01 |
Peritoneal dialysis method
Grant 4,976,683 - Gauthier , et al. December 11, 1 | 1990-12-11 |
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