Gaudiello; John G.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Gaudiello; John G..The latest application filed is for "fabrication of logic devices and power devices on the same substrate".

Company Profile

6.20.14

Gaudiello; John G. - Poughkeepsie NY
Gaudiello; John G. - Waterford NY
Gaudiello; John G - Poughkeepsie NY
Gaudiello; John G. - Apalachin NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Fabrication of logic devices and power devices on the same substrate Grant 11,244,869 - Li , et al. February 8, 2	2022-02-08
Forming strained channels for CMOS device fabrication Grant 10,943,902 - Li , et al. March 9, 2	2021-03-09
Method and structure of forming strained channels for CMOS device fabrication Grant 10,756,088 - Li , et al. A	2020-08-25
Fabrication Of Logic Devices And Power Devices On The Same Substrate App 20200258790 - A1	2020-08-13
Fabrication of logic devices and power devices on the same substrate Grant 10,685,886 - Li , et al.	2020-06-16
Method and structure of forming strained channels for CMOS device fabrication Grant 10,593,672 - Li , et al.	2020-03-17
Method And Structure Of Forming Strained Channels For Cmos Device Fabrication App 20190371797 - Li; Juntao ; et al.	2019-12-05
Method And Structure Of Forming Strained Channels For Cmos Device Fabrication App 20190363082 - Li; Juntao ; et al.	2019-11-28
Method And Structure Of Forming Strained Channels For Cmos Device Fabrication App 20190214386 - Li; Juntao ; et al.	2019-07-11
Fabrication Of Logic Devices And Power Devices On The Same Substrate App 20190189521 - Li; Juntao ; et al.	2019-06-20
Integrated capacitors with nanosheet transistors Grant 10,170,548 - Cheng , et al. J	2019-01-01
Integrated Capacitors With Nanosheet Transistors App 20180219066 - Cheng; Kangguo ; et al.	2018-08-02
Integrated capacitors with nanosheet transistors Grant 9,985,097 - Cheng , et al. May 29, 2	2018-05-29
Integrated Capacitors With Nanosheet Transistors App 20180006113 - Cheng; Kangguo ; et al.	2018-01-04
Phase change memory cell with vertical transistor Grant 7,932,167 - Furukawa , et al. April 26, 2	2011-04-26
Sidewall image transfer processes for forming multiple line-widths Grant 7,699,996 - Furukawa , et al. April 20, 2	2010-04-20
Method of TEM sample preparation for electron holography for semiconductor devices Grant 7,560,692 - Barton , et al. July 14, 2	2009-07-14
Phase Change Memory Cell with Vertical Transistor App 20090001337 - Furukawa; Toshiharu ; et al.	2009-01-01
Sidewall Image Transfer Processes For Forming Multiple Line-widths App 20080206996 - Furukawa; Toshiharu ; et al.	2008-08-28
Method Of Tem Sample Preparation For Electron Holography For Semiconductor Devices App 20080156987 - Barton; Keith E. ; et al.	2008-07-03
Transmission electron microscopy sample preparation method for electron holography Grant 7,214,935 - Bauer , et al. May 8, 2	2007-05-08
Transmission Electron Microscopy Sample Preparation Method For Electron Holography App 20060065830 - Bauer; Thomas A. ; et al.	2006-03-30
Electron holography method Grant 7,015,469 - Wang , et al. March 21, 2	2006-03-21
Process for manufacturing a printed wiring board Grant 7,007,378 - Gaudiello , et al. March 7, 2	2006-03-07
Electron holography method App 20040195506 - Wang, Yun-Yu ; et al.	2004-10-07
Method for forming Co-W-P-Au films Grant 6,646,345 - Sambucetti , et al. November 11, 2	2003-11-11
Alternate metallurgy for land grid array connectors App 20030102160 - Gaudiello, John G. ; et al.	2003-06-05
Method for forming Co-W-P-Au films App 20020123220 - Sambucetti, Carlos Juan ; et al.	2002-09-05
Copper seed layer repair technique using electroless touch-up Grant 6,395,164 - Andricacos , et al. May 28, 2	2002-05-28
Method of forming barrier layers for damascene interconnects Grant 6,358,832 - Edelstein , et al. March 19, 2	2002-03-19
Method for preparing a conductive pad for electrical connection and conductive pad formed Grant 6,335,104 - Sambucetti , et al. January 1, 2	2002-01-01
Method for forming Co-W-P-Au films Grant 6,323,128 - Sambucetti , et al. November 27, 2	2001-11-27
Dual etch stop/diffusion barrier for damascene interconnects Grant 6,153,935 - Edelstein , et al. November 28, 2	2000-11-28
Metallized substrate Grant 5,616,422 - Ballard , et al. April 1, 1	1997-04-01

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