loadpatents
name:-0.00041508674621582
name:-0.028932094573975
name:-0.00052309036254883
Gates; Stillman F. Patent Filings

Gates; Stillman F.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Gates; Stillman F..The latest application filed is for "methods for configuring separate accessibility of each channel of a dual channel scsi chip".

Company Profile
0.22.0
  • Gates; Stillman F. - Los Gatos CA
  • Gates; Stillman F. - Capistrano Beach CA
  • Gates; Stillman F. - Anaheim CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Methods for configuring separate accessibility of each channel of a dual channel SCSI chip
Grant 6,880,033 - Mahmoud , et al. April 12, 2
2005-04-12
Serial bus for connecting two integrated circuits with storage for input/output signals
Grant 6,516,366 - Gates , et al. February 4, 2
2003-02-04
Fast stack save and restore system and method
Grant 6,449,709 - Gates September 10, 2
2002-09-10
Host adapter having paged payload buffers for simultaneously transferring data between a computer bus and a peripheral bus
Grant 6,279,051 - Gates , et al. August 21, 2
2001-08-21
Host adapter capable of simultaneously transmitting and receiving data of multiple contexts between a computer bus and peripheral bus
Grant 6,202,105 - Gates , et al. March 13, 2
2001-03-13
Decoupled serial memory access with passkey protected memory areas
Grant 6,148,384 - Devanagundy , et al. November 14, 2
2000-11-14
Communications interface adapter for a computer system including posting of system interrupt status
Grant 6,085,278 - Gates , et al. July 4, 2
2000-07-04
Error generation circuit for testing a digital bus
Grant 6,049,894 - Gates April 11, 2
2000-04-11
Timer using a single counter to track multiple time-outs
Grant 6,002,737 - Devanagundy , et al. December 14, 1
1999-12-14
Host adaptor comprising a status switching circuit which couples an output line to a function input line in response to a function enable line signal
Grant 5,978,863 - Gates , et al. November 2, 1
1999-11-02
Error generation circuit for testing a digital bus
Grant 5,978,934 - Gates November 2, 1
1999-11-02
Host adapter integrated circuit having autoaccess pause
Grant 5,960,180 - Gates September 28, 1
1999-09-28
Integrated circuit with a serial port having only one pin
Grant 5,826,068 - Gates October 20, 1
1998-10-20
Deskew circuit in a host interface circuit
Grant 5,748,806 - Gates May 5, 1
1998-05-05
Synchronization circuit for clocked signals of similar frequencies
Grant 5,729,719 - Gates March 17, 1
1998-03-17
Method and apparatus for automatically loading configuration data on reset into a host adapter integrated circuit
Grant 5,727,207 - Gates , et al. March 10, 1
1998-03-10
Error generation circuit for testing a digital bus
Grant 5,701,409 - Gates December 23, 1
1997-12-23
Programmably configurable host adapter integrated circuit including a RISC processor
Grant 5,659,690 - Stuber , et al. August 19, 1
1997-08-19
Status indicator for a host adapter
Grant 5,657,455 - Gates , et al. August 12, 1
1997-08-12
Data communications switching device having multiple switches operating at plural selectable data rates
Grant 4,755,988 - Nelson , et al. July 5, 1
1988-07-05
Integrated voice/data/control switching system
Grant 4,597,077 - Nelson , et al. June 24, 1
1986-06-24
Distributed variable bandwidth switch for voice, data, and image communications
Grant 4,587,651 - Nelson , et al. May 6, 1
1986-05-06

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed