Gasner; John T.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Gasner; John T..The latest application filed is for "active area bonding compatible high current structures".

Company Profile

0.27.13

Gasner; John T. - Satellite Beach FL US
Gasner; John T - Satellite Beach FL
Gasner; John T. - Melbourne FL

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Devices including bond pad having protective sidewall seal Grant 8,963,266 - Li , et al. February 24, 2	2015-02-24
Active area bonding compatible high current structures Grant 8,946,912 - Gasner , et al. February 3, 2	2015-02-03
Active Area Bonding Compatible High Current Structures App 20140113444 - Gasner; John T. ; et al.	2014-04-24
Active area bonding compatible high current structures Grant 8,652,960 - Gasner , et al. February 18, 2	2014-02-18
Active area bonding compatible high current structures Grant 8,569,896 - Gasner , et al. October 29, 2	2013-10-29
Protecting bond pad for subsequent processing Grant 8,536,044 - Li , et al. September 17, 2	2013-09-17
Active Area Bonding Compatible High Current Structures App 20130130445 - Gasner; John T. ; et al.	2013-05-23
Integrated process for thin film resistors with silicides Grant 8,338,914 - Gasner , et al. December 25, 2	2012-12-25
Active Area Bonding Compatible High Current Structures App 20120261836 - Gasner; John T. ; et al.	2012-10-18
Devices Including Bond Pad Having Protective Sidewall Seal App 20120241893 - Li; Helen Hongwei ; et al.	2012-09-27
Active area bonding compatible high current structures Grant 8,274,160 - Gasner , et al. September 25, 2	2012-09-25
Protecting Bond Pad For Subsequent Processing App 20120007199 - Li; Helen Hongwei ; et al.	2012-01-12
Active Area Bonding Compatible High Current Structures App 20100261344 - Gasner; John T. ; et al.	2010-10-14
Active area bonding compatible high current structures Grant 7,795,130 - Gasner , et al. September 14, 2	2010-09-14
Integrated Process For Thin Film Resistors With Silicides App 20100117198 - Gasner; John T. ; et al.	2010-05-13
Integrated process for thin film resistors with silicides Grant 7,662,692 - Gasner , et al. February 16, 2	2010-02-16
Integrated process for thin film resistors with silicides Grant 7,341,958 - Gasner , et al. March 11, 2	2008-03-11
Integrated Process For Thin Film Resistors With Silicides App 20080026536 - Gasner; John T. ; et al.	2008-01-31
Active Area Bonding Compatible High Current Structures App 20070187837 - Gasner; John T. ; et al.	2007-08-16
Active Area Bonding Compatible High Current Structures App 20070184645 - Gasner; John T. ; et al.	2007-08-09
Active area bonding compatible high current structures Grant 7,224,074 - Gasner , et al. May 29, 2	2007-05-29
Integrated process for thin film resistors with silicides App 20060166505 - Gasner; John T. ; et al.	2006-07-27
Active area bonding compatible high current structures App 20060099823 - Gasner; John T. ; et al.	2006-05-11
Active area bonding compatible high current structures Grant 7,005,369 - Gasner , et al. February 28, 2	2006-02-28
Active area bonding compatible high current structures App 20050042853 - Gasner, John T. ; et al.	2005-02-24
CMOS integrated circuit architecture incorporating deep implanted emitter region to form auxiliary bipolar transistor Grant 6,350,640 - Fuller , et al. February 26, 2	2002-02-26
Non-uniformly nitrided gate oxide and method Grant 5,808,348 - Ito , et al. September 15, 1	1998-09-15
Arrangement and method for improving room-temperature testability of CMOS integrated circuits optimized for cryogenic temperature operation Grant 5,696,452 - Hemmenway , et al. December 9, 1	1997-12-09
Method of making non-uniformly nitrided gate oxide Grant 5,650,344 - Ito , et al. July 22, 1	1997-07-22
Direct etch for thin film resistor using a hard mask Grant 5,547,896 - Linn , et al. August 20, 1	1996-08-20
Analog-to-digital converter Grant 5,481,129 - DeJong , et al. January 2, 1	1996-01-02
ESD protection transistors Grant 4,760,433 - Young , et al. July 26, 1	1988-07-26
Via metallization using metal fillets Grant 4,666,737 - Gimpelson , et al. May 19, 1	1987-05-19
Process of making twin well VLSI CMOS Grant 4,599,789 - Gasner July 15, 1	1986-07-15
Implant mask reversal process Grant 4,578,859 - Hause , et al. April 1, 1	1986-04-01
High voltage CMOS with local oxidation for self-aligned guard rings and process of fabrication Grant 4,223,334 - Gasner , et al. September 16, 1	1980-09-16
Process for fabricating high voltage CMOS with self-aligned guard rings utilizing selective diffusion and local oxidation Grant 4,135,955 - Gasner , et al. January 23, 1	1979-01-23

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