Garnett; Martin E.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Garnett; Martin E..The latest application filed is for "vertical discrete devices with trench contacts and associated methods of manufacturing".

Company Profile

0.13.7

Garnett; Martin E. - Los Gatos CA US

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Low leakage and/or low turn-on voltage Schottky diode Grant 8,809,988 - Yoo , et al. August 19, 2	2014-08-19
High voltage high side DMOS and the method for forming thereof Grant 8,772,867 - Yoo , et al. July 8, 2	2014-07-08
High voltage junction field effect transistor with spiral field plate Grant 8,598,637 - Hsing , et al. December 3, 2	2013-12-03
Vertical discrete devices with trench contacts and associated methods of manufacturing Grant 8,304,825 - Garnett November 6, 2	2012-11-06
Vertical Discrete Devices With Trench Contacts And Associated Methods Of Manufacturing App 20120068231 - Garnett; Martin E.	2012-03-22
Low Leakage And/or Low Turn-on Voltage Schottky Diode App 20110156199 - Yoo; Ji-Hyoung ; et al.	2011-06-30
High Voltage Junction Field Effect Transistor With Spiral Field Plate App 20110068377 - Hsing; Michael R. ; et al.	2011-03-24
Silicon Die Floorplan With Application To High-voltage Field Effect Transistors App 20110068410 - Garnett; Martin E. ; et al.	2011-03-24
Box-in-box field-to-field alignment structure Grant 7,273,761 - Rumsey , et al. September 25, 2	2007-09-25
Box-in-box field-to-field alignment structure App 20050042529 - Rumsey, Robert W. ; et al.	2005-02-24
Triply implanted complementary bipolar transistors Grant 6,838,350 - Garnett , et al. January 4, 2	2005-01-04
Box-in-box field-to-field alignment structure Grant 6,815,128 - Rumsey , et al. November 9, 2	2004-11-09
Triply implanted complementary bipolar transistors App 20040212043 - Garnett, Martin E. ; et al.	2004-10-28
Box-in-box field-to-field alignment structure App 20030186132 - Rumsey, Robert W. ; et al.	2003-10-02
Method of forming a resistor having a serpentine pattern through multiple use of an alignment keyed mask Grant 5,753,391 - Stone , et al. May 19, 1	1998-05-19
Self-alignment technique for forming junction isolation and wells Grant 5,556,796 - Garnett , et al. September 17, 1	1996-09-17
High voltage lateral DMOS device with enhanced drift region Grant 5,517,046 - Hsing , et al. May 14, 1	1996-05-14
Semi self-aligned high voltage P channel FET Grant 5,047,820 - Garnett September 10, 1	1991-09-10

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