loadpatents
Patent applications and USPTO patent grants for Garcia Pabon; Jorge F..The latest application filed is for "tile sequencing mechanism".
Patent | Date |
---|---|
Tile Sequencing Mechanism App 20220262070 - Maiyuran; Subramaniam ;   et al. | 2022-08-18 |
Hierarchical Tiling Mechanism App 20220198735 - Maiyuran; Subramaniam ;   et al. | 2022-06-23 |
Tile sequencing mechanism Grant 11,250,627 - Maiyuran , et al. February 15, 2 | 2022-02-15 |
Tile Sequencing Mechanism App 20210407194 - Maiyuran; Subramaniam ;   et al. | 2021-12-30 |
Single input multiple data processing mechanism Grant 10,769,751 - Maiyuran , et al. Sep | 2020-09-08 |
Software scoreboard information and synchronization Grant 10,692,170 - Maiyuran , et al. | 2020-06-23 |
Single Input Multiple Data Processing Mechanism App 20200043124 - MAIYURAN; SUBRAMANIAM ;   et al. | 2020-02-06 |
Method and apparatus for adaptive pixel hashing for graphics processors Grant 10,546,362 - Bhiravabhatla , et al. Ja | 2020-01-28 |
Software Scoreboard Information And Synchronization App 20190362460 - Maiyuran; Subramaniam ;   et al. | 2019-11-28 |
Single input multiple data processing mechanism Grant 10,417,730 - Maiyuran , et al. Sept | 2019-09-17 |
Method and apparatus for a high throughput rasterizer Grant 10,410,081 - Maiyuran , et al. Sept | 2019-09-10 |
Software scoreboard information and synchronization Grant 10,360,654 - Maiyuran , et al. | 2019-07-23 |
Reduced power implementation of computer instructions Grant 10,297,001 - Maiyuran , et al. | 2019-05-21 |
Rasterization based on partial spans Grant 10,269,154 - Maiyuran , et al. | 2019-04-23 |
Method And Apparatus For Adaptive Pixel Hashing For Graphics Processors App 20180218474 - Bhiravabhatla; Kalyan K. ;   et al. | 2018-08-02 |
Single Input Multiple Data Processing Mechanism App 20180174350 - Maiyuran; Subramaniam ;   et al. | 2018-06-21 |
Handling instructions that require adding results of a plurality of multiplications Grant 9,904,513 - Maiyuran , et al. February 27, 2 | 2018-02-27 |
Method and apparatus for adaptive pixel hashing for graphics processors Grant 9,836,809 - Bhiravabhatla , et al. December 5, 2 | 2017-12-05 |
Rasterization Based on Partial Spans App 20170178370 - Maiyuran; Subramaniam ;   et al. | 2017-06-22 |
Method And Apparatus For Adaptive Pixel Hashing For Graphics Processors App 20170091893 - BHIRAVABHATLA; KALYAN K. ;   et al. | 2017-03-30 |
Handling Instructions that Require Adding Results of a Plurality of Multiplications App 20160378432 - Maiyuran; Subramaniam ;   et al. | 2016-12-29 |
Reduced Power Implementation Of Computer Instructions App 20160189327 - MAIYURAN; SUBRAMANIAM ;   et al. | 2016-06-30 |
Method And Apparatus For A High Throughput Rasterizer App 20160180585 - MAIYURAN; SUBRAMANIAM ;   et al. | 2016-06-23 |
uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.
While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.
All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.