| Patent | Date |
|---|
Methods for Cell Phasing and Placement in Dynamic Array Architecture and Implementation of the Same
App 20180196909 - Quandt; Jonathan R. ; et al. | 2018-07-12 |
Methods for cell phasing and placement in dynamic array architecture and implementation of the same
Grant 9,910,950 - Quandt , et al. March 6, 2 | 2018-03-06 |
Methods for Cell Boundary Encroachment and Semiconductor Devices Implementing the Same
App 20170104004 - Quandt; Jonathan R. ; et al. | 2017-04-13 |
Methods for cell boundary encroachment and semiconductor devices implementing the same
Grant 9,530,795 - Quandt , et al. December 27, 2 | 2016-12-27 |
Methods for Cell Phasing and Placement in Dynamic Array Architecture and Implementation of the Same
App 20160357897 - Quandt; Jonathan R. ; et al. | 2016-12-08 |
Methods for cell phasing and placement in dynamic array architecture and implementation of the same
Grant 9,424,387 - Quandt , et al. August 23, 2 | 2016-08-23 |
Methods for Cell Boundary Encroachment and Semiconductor Devices Implementing the Same
App 20160172375 - Quandt; Jonathan R. ; et al. | 2016-06-16 |
Methods for cell boundary encroachment and layouts implementing the same
Grant 9,269,702 - Quandt , et al. February 23, 2 | 2016-02-23 |
Methods for Cell Phasing and Placement in Dynamic Array Architecture and Implementation of the Same
App 20150143321 - Quandt; Jonathan R. ; et al. | 2015-05-21 |
Circuits with linear finfet structures
Grant 9,009,641 - Becker , et al. April 14, 2 | 2015-04-14 |
Methods for cell phasing and placement in dynamic array architecture and implementation of the same
Grant 8,966,424 - Quandt , et al. February 24, 2 | 2015-02-24 |
Finfet transistor circuit
Grant 8,863,063 - Becker , et al. October 14, 2 | 2014-10-14 |
Methods for Cell Boundary Encroachment and Layouts Implementing the Same
App 20140167117 - Quandt; Jonathan R. ; et al. | 2014-06-19 |
Methods for cell boundary encroachment and layouts implementing the Same
Grant 8,661,392 - Quandt , et al. February 25, 2 | 2014-02-25 |
Methods for Cell Phasing and Placement in Dynamic Array Architecture and Implementation of the Same
App 20140035152 - Quandt; Jonathan R. ; et al. | 2014-02-06 |
Methods for cell phasing and placement in dynamic array architecture and implementation of the same
Grant 8,549,455 - Quandt , et al. October 1, 2 | 2013-10-01 |
Finfet Transistor Circuit
App 20130207199 - Becker; Scott T. ; et al. | 2013-08-15 |
Circuits With Linear Finfet Structures
App 20130126978 - Becker; Scott T. ; et al. | 2013-05-23 |
Methods for Cell Phasing and Placement in Dynamic Array Architecture and Implementation of the Same
App 20120273841 - Quandt; Jonathan R. ; et al. | 2012-11-01 |
Methods for cell phasing and placement in dynamic array architecture and implementation of the same
Grant 8,214,778 - Quandt , et al. July 3, 2 | 2012-07-03 |
Methods for Cell Boundary Encroachment and Layouts Implementing the Same
App 20110084312 - Quandt; Jonathan R. ; et al. | 2011-04-14 |
Power controlling integrated circuit cell
Grant 7,863,778 - Flynn , et al. January 4, 2 | 2011-01-04 |
Methods for Cell Phasing and Placement in Dynamic Array Architecture and Implementation of the Same
App 20090271753 - Quandt; Jonathan R. ; et al. | 2009-10-29 |
Power Controlling Integrated Circuit Cell
App 20090066164 - Flynn; David Walter ; et al. | 2009-03-12 |
Dynamically adaptable memory
Grant 6,999,354 - Aitken , et al. February 14, 2 | 2006-02-14 |
System and method for assured built in self repair of memories
Grant 6,973,605 - Templeton , et al. December 6, 2 | 2005-12-06 |
Memory column redundancy circuitry and method for implementing the same
Grant 6,966,012 - Gandhi November 15, 2 | 2005-11-15 |
Dynamically adaptable memory
App 20050237823 - Aitken, Robert C. ; et al. | 2005-10-27 |
Yield maximization in the manufacture of integrated circuits
Grant 6,957,402 - Templeton , et al. October 18, 2 | 2005-10-18 |
Leakage current reduction in standard cells
Grant 6,941,525 - Gandhi September 6, 2 | 2005-09-06 |
Yield maximization in the manufacture of integrated circuits
App 20050066294 - Templeton, Mark ; et al. | 2005-03-24 |
Method for identification of faulty or weak functional logic elements under simulated extreme operating conditions
Grant 6,862,721 - Templeton , et al. March 1, 2 | 2005-03-01 |
Leakage current reduction in standard cells
App 20040243946 - Gandhi, Dhrumil | 2004-12-02 |
Method for identification of faulty or weak functional logic elements under simulated extreme operating conditions
App 20040062095 - Templeton, Mark ; et al. | 2004-04-01 |
System And Method For Identification Of Faulty Or Weak Memory Cells Under Simulated Extreme Operating Conditions
App 20040004872 - Templeton, Mark ; et al. | 2004-01-08 |
System and method for identification of faulty or weak memory cells under simulated extreme operating conditions
Grant 6,667,917 - Templeton , et al. December 23, 2 | 2003-12-23 |
Cell architecture with local interconnect and method for making same
Grant 6,594,813 - Gandhi , et al. July 15, 2 | 2003-07-15 |
Methods for designing standard cell transistor structures
Grant 6,477,695 - Gandhi November 5, 2 | 2002-11-05 |
Cell architecture with local interconnect and method for making same
Grant 6,448,631 - Gandhi , et al. September 10, 2 | 2002-09-10 |
Cell Architecture With Local Interconnect And Method For Making Same
App 20010045571 - GANDHI, DHRUMIL ; et al. | 2001-11-29 |
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