loadpatents
name:-0.015046119689941
name:-0.010977983474731
name:-0.0064949989318848
Gan; Cheng Patent Filings

Gan; Cheng

Patent Applications and Registrations

Patent applications and USPTO patent grants for Gan; Cheng.The latest application filed is for "structure and method for forming capacitors for a three-dimensional nand".

Company Profile
4.7.11
  • Gan; Cheng - Hubei CN
  • GAN; Cheng - Wuhan CN
  • Gan; Cheng - Nanjing CN
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Structure and method for forming capacitors for a three-dimensional NAND
Grant 11,437,464 - Chen , et al. September 6, 2
2022-09-06
Structure And Method For Forming Capacitors For A Three-dimensional Nand
App 20220208960 - CHEN; Liang ;   et al.
2022-06-30
Novel Capacitor Structure And Method Of Forming The Same
App 20220101906 - CHEN; Liang ;   et al.
2022-03-31
Local word line driver device, memory device, and fabrication method thereof
Grant 11,270,770 - Gan , et al. March 8, 2
2022-03-08
Backside deep isolation structures for semiconductor device arrays
Grant 11,264,455 - Liu , et al. March 1, 2
2022-03-01
Novel Capacitor Structure And Method Of Forming The Same
App 20220059152 - CHEN; Liang ;   et al.
2022-02-24
Capacitor structure and method of forming the same
Grant 11,232,825 - Chen , et al. January 25, 2
2022-01-25
Three-dimensional memory devices with backside isolation structures
Grant 11,177,343 - Gan , et al. November 16, 2
2021-11-16
Three-dimensional memory devices with deep isolation structures
Grant 11,031,282 - Chen , et al. June 8, 2
2021-06-08
Local Word Line Driver Device, Memory Device, And Fabrication Method Thereof
App 20210166762 - GAN; Cheng ;   et al.
2021-06-03
Backside Deep Isolation Structures For Semiconductor Device Arrays
App 20210118989 - LIU; Wei ;   et al.
2021-04-22
Three-dimensional Memory Devices With Backside Isolation Structures
App 20210118988 - GAN; Cheng ;   et al.
2021-04-22
Structure And Method For Isolation Of Bit-line Drivers For A Three-dimensional Nand
App 20210111137 - CHEN; Liang ;   et al.
2021-04-15
Structure And Method For Forming Capacitors For A Three-dimensional Nand
App 20210013303 - CHEN; Liang ;   et al.
2021-01-14
Three-dimensional Memory Devices With Deep Isolation Structures
App 20210013088 - Chen; Liang ;   et al.
2021-01-14
Novel Capacitor Structure And Method Of Forming The Same
App 20200265886 - Chen; Liang ;   et al.
2020-08-20
Optical module availability detection method and apparatus
Grant 10,090,916 - Gan , et al. October 2, 2
2018-10-02
Optical Module Availability Detection Method and Apparatus
App 20160191153 - Gan; Cheng ;   et al.
2016-06-30

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